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d7d959da45
- This is DEFINITELY the way to do things, sweep the delays and find the right value. No f'ing way to get these stupid FPGAs to work otherwise with the ridiculuosly over margined PVT nubmers they are running through the STAs. I understand they want to make the design bullet proof, but as a result designers are wasting countless hours overoptimzinng designs and being clever. So much performance is left on the table for expert users. - Lesson: I/O design should be "self syncrhonizing". Only contraints in the design should be create_clk - Made RX clock async, too tricky to guarantee that there clock is there. No way to do this if the clock sources are actually independent for RX/TX!
74 lines
2.1 KiB
Verilog
74 lines
2.1 KiB
Verilog
module ereset (/*AUTOARG*/
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// Outputs
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etx_reset, erx_reset, sys_reset,
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// Inputs
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reset, sys_clk, tx_lclk_div4, rx_lclk_div4
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);
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// reset inputs
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input reset; // POR | ~elink_en (with appropriate delays..)
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//synchronization clocks
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input sys_clk; // system clock
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input tx_lclk_div4; // slow clock for TX
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input rx_lclk_div4; // slow clock for RX
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//synchronous reset outputs
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output etx_reset; // reset for TX slow logic
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output erx_reset; // reset for RX slow logic
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output sys_reset; // reset for system FIFOs
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wire erx_resetb;
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wire etx_resetb;
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wire sys_resetb;
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//erx reset synchronizer
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/*
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synchronizer sync_erx (.out (erx_resetb),
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.in (1'b1),
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.clk (rx_lclk_div4),
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.reset (reset)
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);
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*/
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//etx reset synchronizer
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synchronizer sync_etx (.out (etx_resetb),
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.in (1'b1),
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.clk (tx_lclk_div4),
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.reset (reset)
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);
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//system reset synchronizer
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synchronizer sync_sys (.out (sys_resetb),
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.in (1'b1),
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.clk (sys_clk),
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.reset (reset)
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);
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assign etx_reset =~etx_resetb;
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assign sys_reset =~sys_resetb;
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assign erx_reset = reset; //async reset! can't guarantee rx clock
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endmodule // ereset
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// Local Variables:
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// verilog-library-directories:("." "../../common/hdl/")
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// End:
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/*
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Copyright (C) 2015 Adapteva, Inc.
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Contributed by Andreas Olofsson <andreas@adapteva.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.This program is distributed in the hope
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that it will be useful,but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details. You should have received a copy
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of the GNU General Public License along with this program (see the file
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COPYING). If not, see <http://www.gnu.org/licenses/>.
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*/
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