This website requires JavaScript.
Explore
Help
Sign In
FPGA
/
oh
Watch
1
Star
0
Fork
0
You've already forked oh
mirror of
https://github.com/aolofsson/oh.git
synced
2025-01-17 20:02:53 +08:00
Code
Issues
Projects
Releases
Wiki
Activity
oh
/
ecfg
History
aolofsson
53f1ef0e46
Add register definition for ESYSDEBUG...
2014-12-12 12:20:18 -05:00
..
dv
Adding run.sh files for simulation
2014-11-05 20:00:57 -05:00
hdl
Add register definition for ESYSDEBUG...
2014-12-12 12:20:18 -05:00
ip_prj
New Vivado-friendly modules, testbench for elink gold-vs-new.
2014-11-19 12:02:18 -05:00
xgui
New Vivado-friendly modules, testbench for elink gold-vs-new.
2014-11-19 12:02:18 -05:00
component.xml
eCfg: Renamed reset input to hw_reset, OR'd into ecfg_reset output.
2014-11-19 16:59:04 -05:00
