mirror of
https://github.com/aolofsson/oh.git
synced 2025-01-30 02:32:53 +08:00
9e41b55f22
-Can be used to select between different cells (like sizes) that have the exact same logical function
17 lines
564 B
Verilog
17 lines
564 B
Verilog
//#############################################################################
|
|
//# Function: Positive edge-triggered inverting static D-type flop-flop #
|
|
//# Copyright: OH Project Authors. ALl rights Reserved. #
|
|
//# License: MIT (see LICENSE file in OH repository) #
|
|
//#############################################################################
|
|
|
|
module asic_dffqn #(parameter PROP = "DEFAULT") (
|
|
input d,
|
|
input clk,
|
|
output reg qn
|
|
);
|
|
|
|
always @ (posedge clk)
|
|
qn <= ~d;
|
|
|
|
endmodule
|