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oh/asiclib/hdl/asic_latnq.v
aolofsson 9e41b55f22 Adding default property to all cells
-Can be used to select between different cells (like sizes) that have the exact same logical function
2021-07-27 22:55:45 -04:00

18 lines
579 B
Verilog

//#############################################################################
//# Function: D-type active-low transparent latch #
//# Copyright: OH Project Authors. ALl rights Reserved. #
//# License: MIT (see LICENSE file in OH repository) #
//#############################################################################
module asic_latnq #(parameter PROP = "DEFAULT") (
input d,
input clk,
output reg q
);
always @ (clk or d)
if(~clk)
q <= d;
endmodule