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Andreas Olofsson
e5163d4d82
Adding debug logic to elink
- packet capture register - transaction counter logic
=======
OH!
An Open Hardware Library for Chip and FPGA designers written in Verilog
CONTENT
Spec | Description |
---|---|
common | Common utility HW modules and scripts |
edma | DMA module |
emesh | Epiphany emesh related circuits |
elink | Epiphany point to point LVDS link |
emailbox | Simple mailbox with interrupt output |
emmu | Simple memory transaction translation unit |
etrace | Simple logic analyzer |
memory | Various simple memory structures (RAM/FIFO) |
xilibs | Simulation modules for Xilinx primitives |
LICENSE
The OH! repository source code is licensed under the MIT license unless otherwise specified. See LICENSE for full copyright terms.
CONTRIBUTING
Instructions for contributing can be found HERE.
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