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22 lines
679 B
Tcl
22 lines
679 B
Tcl
#PLL CLOCK
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create_clock -name pll_clkin -period 10 [get_ports pll_clkin]
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#SYS_CLK
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create_clock -name sys_clk -period 8 [get_ports sys_clk]
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#RECEIVER
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create_clock -name rx_lclk -period 2 [get_ports rxi_lclk_p]
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set_input_delay -clock rx_lclk 0.5 [get_ports rxi_data_*]
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set_input_delay -clock rx_lclk 0.5 [get_ports rxi_frame_*]
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#TRANSMITTER
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create_clock -name tx_lclk -period 2 elink/eclocks/pll_lclk/CLKOUT0
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create_clock -name tx_lclk90 -period 2 elink/eclocks/pll_lclk/CLKOUT1
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create_clock -name tx_lclk_div4 -period 8 elink/eclocks/pll_lclk/CLKOUT2
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set_output_delay -clock tx_lclk 0.5 [get_ports txo_data_*]
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set_output_delay -clock tx_lclk 0.5 [get_ports txo_frame_*]
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