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66 lines
2.2 KiB
Systemverilog
66 lines
2.2 KiB
Systemverilog
`ifndef ELINK_REGMAP_V_
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`define ELINK_REGMAP_V_
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//MEMORY MAP
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//[31:20] = LINKID
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//[19:16] = GROUP SELECT
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//[15] = MMU SELECT (for RX/TX)
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//[14:11] = USED BY MMU ONLY
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//[10:8] = register group
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//[7:2] = REGISTER ADDRESS (0..63)
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//[1:0] = IGNORED (no byte access)
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//Link register groups addr[19:16]
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`define EGROUP_MMR 4'hF // reserved for registers
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`define EGROUP_MMU 4'hE // MMU RX([15]==1), TX([15]==0)
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`define EGROUP_RR 4'hD // read response block
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//Register blocks[10:8]
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`define EGROUP_RF 3'd0 //0x000
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`define EGROUP_TX 3'd2 //0x200
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`define EGROUP_RX 3'd3 //0x300
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`define EGROUP_CORE 3'd4 //0x400
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`define EGROUP_DMA 3'd5 //0x500
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`define EGROUP_MEM 3'd6 //0x600
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`define EGROUP_MESH 3'd7 //0x700
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//ETX-REGS
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`define E_RESET 6'd0 //F0200-reset
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`define E_CLK 6'd1 //F0204-clock configuration
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`define E_CHIPID 6'd2 //F0208-Epiphany chip id for colid/rowid pins
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`define E_VERSION 6'd3 //F020C-version #
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`define ETX_CFG 6'd4 //F0210-config
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`define ETX_STATUS 6'd5 //F0214-tx status
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`define ETX_GPIO 6'd6 //F0218-direct data for tx pins
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`define ETX_MONITOR 6'd7 //F021C-transaction monitor
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`define ETX_PACKET 6'd8 //F0220-outgoing packet sampler
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//ERX-REGS
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`define ERX_CFG 6'd0 //F0300-config
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`define ERX_STATUS 6'd1 //F0304-status register
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`define ERX_GPIO 6'd2 //F0308-sampled data
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`define ERX_OFFSET 6'd3 //F030C-memory base for remap
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`define ERX_IDELAY0 6'd4 //F0310-tap delay for d[5:0]
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`define ERX_IDELAY1 6'd5 //F0314-tap delays for {frame,d[7:6]}
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`define ERX_TESTDATA 6'd6 //F0318-received test data
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//MAILBOX REGS
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`ifndef E_MAILBOXLO
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`define E_MAILBOXLO 6'hC //F0730-lower 32 bits of mailbox
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`define E_MAILBOXHI 6'hD //F0734-upper 32 bits of mailbox
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`define E_MAILBOXSTAT 6'hE //F0738-mailbox status
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`endif
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//DMA (same numbering as in Epiphany, limit to 4 channels)
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`define DMACFG 5'd0 //F0500/F0520
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`define DMACOUNT 5'd1 //F0504/F0524
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`define DMASTRIDE 5'd2 //F0508/F0528
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`define DMASRCADDR 5'd3 //F050C/F052c
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`define DMADSTADDR 5'd4 //F0510/F0530
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`define DMAAUTO0 5'd5 //F0514/F0534
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`define DMAAUTO1 5'd6 //F0518/F0538
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`define DMASTATUS 5'd7 //F051C/F053c
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`endif
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