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29 lines
698 B
Verilog
29 lines
698 B
Verilog
//MEMORY MAP
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//Group set with bits 19:16
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//Epiphany Register Memory Map
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`define EGROUP_MMR 4'hE
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`define EGROUP_RXMMU 4'hD
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`define EGROUP_TXMMU 4'hC
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//ELINK REGISTERS addr[6:2]
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`define ELRESET 5'h0 //E0000
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`define ELCLK 5'h1 //E0004
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`define ELTX 5'h2 //E0008
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`define ELRX 5'h3 //E000C
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`define ELCOREID 5'h4 //E0010
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`define ELVERSION 5'h5 //E0014
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`define ELDATAIN 5'h6 //E0018
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`define ELDATAOUT 5'h7 //E001C
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`define ELDEBUG 5'h8 //E0020
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`define EMAILBOXLO 5'h9 //E0024
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`define EMAILBOXHI 5'hA //E0028
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`define EDMACFG 5'hB //E002C
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`define EDMASTATUS 5'hC //E0030
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`define EDMASRC 5'hD //E0034
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`define EDMADST 5'hE //E0038
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`define EDMACOUNT 5'hF //E0053C
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