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oh/README.md
Andreas Olofsson b0b9315bf1 Massive checkin... 
-this may break already broken projects
-creates a Verilog top level (instead of using Vivado block level design)
-integrates mmy and mailbox (not completely integrated)
-compiles...
-pours in all of the code from the archive
(some new logic created)
2015-03-24 20:44:03 -04:00

646 B
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##DIRECTORY STRUCTURE

  • elink: Top level elink block
  • axi: Master and slave interface for elink
  • common: Various reusable blocks
  • eclock: Drives all clocks for elink and epiphany
  • ecfg: Configuration register file for the elink
  • gpio: GPIO block
  • i2c: I2C wrapper
  • etx: The elink transmitter logic
  • erx: The elink receiver logic
  • memory: Memory wrappers
  • emmu: Memory management unit
  • embox: Mailbox with interrupts

##DIRECTORY CONTENT Each block should be considered a reusabel entitity and include hdl source code as well as a basic test environment.