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Andreas Olofsson f35ed3836d Only primitiveds in the xilibs (no generated IP)
2015-04-21 21:44:44 -04:00
common/hdl
Clock divider fixup
2015-04-18 16:12:43 -04:00
elink
Reorg
2015-04-21 21:33:49 -04:00
embox
Integrating emesh memory module
2015-04-20 23:07:13 -04:00
emmu
MMU working...
2015-04-19 21:36:47 -04:00
memory/hdl
Rename
2015-04-21 17:12:52 -04:00
xilibs/hdl
Only primitiveds in the xilibs (no generated IP)
2015-04-21 21:44:44 -04:00
.gitignore
Cleanup
2015-04-21 21:43:16 -04:00
CONTRIBUTING.md
Basic infrastructure
2015-04-21 21:36:37 -04:00
COPYING
Basic infrastructure
2015-04-21 21:36:37 -04:00
LICENSE
Initial commit
2015-04-21 21:16:42 -04:00
README.md
Basic infrastructure
2015-04-21 21:36:37 -04:00

README.md

=======

OH!

Open Hardware (Pure and Simple)

Description
No description provided
Readme MIT 43 MiB
Languages
Verilog 81.1%
Tcl 10.7%
C 5.6%
Shell 0.8%
Python 0.6%
Other 1.2%