Andreas Olofsson f77938e9b0 Simplifying TX logic!!!! ...

- The logic was a mess, causing me to go around in circles for days. In the end, by adding a missing sync circuit (duh!) between the fast and slow clock to align the edges and removing a redundant pipeline stage ("double") the nasty logic just fell away. Looks good now.
-Write bursts mostly works and design looks clean.
-one bug left to fix on streams of writes...

2015-11-15 01:35:46 -05:00

..

axi_elink.v

Bug fix. Adding missing ID parameter.

2015-11-11 13:58:04 -05:00

ecfg_if.v

Adding write from stimulus to dv link1

2015-11-11 14:02:02 -05:00

elink_cfg.v

Lint fixes for icarus/verilator

2015-11-09 21:57:25 -05:00

elink_constants.v

Link cleanup

2015-11-02 16:10:05 -05:00

elink_regmap.v

Cleanup

2015-11-06 22:34:08 -05:00

elink.v

Fixing reset bug

2015-11-10 09:19:45 -05:00

emaxi.v

Fixing half/byte zero-out bug

2015-11-11 14:00:13 -05:00

erx_arbiter.v

Re-re-fixing the wait on RX

2015-11-15 01:34:20 -05:00

erx_cfg.v

Cleaning up warnings from FGPA tools

2015-11-09 13:23:40 -05:00

erx_clocks.v

Balancing TXclocks

2015-11-10 09:19:01 -05:00

erx_core.v

Various wait cleanups in RX

2015-11-13 16:28:40 -05:00

erx_fifo.v

Various wait cleanups in RX

2015-11-13 16:28:40 -05:00

erx_io.v

Bringing access low during wait

2015-11-12 00:58:06 -05:00

erx_protocol.v

Bringing access low during wait

2015-11-12 00:58:06 -05:00

erx_remap.v

Reset timing optimization

2015-10-08 10:34:59 -04:00

erx_timer.v

Converting to synchronous reset

2015-05-17 23:00:53 -04:00

erx.v

Various wait cleanups in RX

2015-11-13 16:28:40 -05:00

esaxi.v

Adding write from stimulus to dv link1

2015-11-11 14:02:02 -05:00

etx_arbiter.v

Removing write decode from wait pushback

2015-11-15 01:35:04 -05:00

etx_cfg.v

Lint fixes for icarus/verilator

2015-11-09 21:57:25 -05:00

etx_clocks.v

Balancing TXclocks

2015-11-10 09:19:01 -05:00

etx_core.v

Simplifying TX logic!!!!

2015-11-15 01:35:46 -05:00

etx_fifo.v

Cleaning up fifo interface

2015-11-09 13:20:46 -05:00

etx_io.v

Simplifying TX logic!!!!

2015-11-15 01:35:46 -05:00

etx_protocol.v

Simplifying TX logic!!!!

2015-11-15 01:35:46 -05:00

etx_remap.v

Two more wait bugs for burst

2015-11-13 17:26:05 -05:00

etx.v

Simplifying TX logic!!!!

2015-11-15 01:35:46 -05:00