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Commiting fix for 40-mhz missing-dword bug.

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In rare cases, when using a slow clock frequency the first C_PCI_DATA_WIDTH/32 dwords would be dropped during a TX transaction (FPGA to host). This was caused by an earlier bug fix, also addressing slow clock frequencies.

In this case, the fix caused RD_EN to stay high for too long, which subsequently caused the first dwords to be dropped.

Also adding: New testing projects which instantiate 12 channels, each with a different clock frequency, and a test script (asyncutil.sh) to test these projects.
This commit is contained in:
Dustin Richmond 2016-08-11 13:07:00 -07:00
parent 778c42e74b
commit 2499f4ff10
34 changed files with 11905 additions and 60 deletions
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60
c_c++/linux/x64/test_apps/asyncutil.sh Executable file
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#!/bin/bash
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
PATH=$PATH:./
RESULT_PATH=./results/
if [ "$#" -lt 2 ]; then
echo "usage: $0 <fpga id> <board name>"
exit
fi
for i in {0..11}
do
testutil 1 $1
# Run full bandwidth test
testutil 2 $1 $i 1048576 | tee $RESULT_PATH/$2_C$i\_bw.txt
# Run RX Sweep Test
testutil 3 $1 $i 2048 | tee $RESULT_PATH/$2_C$i\_rx.txt
# Run TX Sweep Test
testutil 4 $1 $i 2048 | tee $RESULT_PATH/$2_C$i\_tx.txt
done

63
fpga/altera/de5/DE5QGen1x8If64_CLK/Makefile Normal file
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# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#-----------------------------------------------------------------------
# Filename: Makefile
# Version: 1.0
# Description: Project-level makefile for building an example project
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------
# This make file expects the following variables to be set:
# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory.
# BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to
# BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory
WIDTH=64
TYPE=classic
CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
PROJECT=$(shell basename $(CURRENT_PATH))
ifndef RIFFA_HDL_PATH
RIFFA_HDL_PATH:=../../../riffa_hdl
endif
ifndef BOARD_PATH
BOARD_PATH:=..
endif
ifndef JOBS
JOBS=1
endif
include $(RIFFA_HDL_PATH)/riffa.mk
include $(BOARD_PATH)/board.mk
PROJECT_IP+=ip/QSysDE5QGen1x8If64.qsys
RELEASE_IP+=ip/QSysDE5QGen1x8If64.qsys

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fpga/altera/de5/DE5QGen1x8If64_CLK/bit/DE5QGen1x8If64.sof Normal file
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fpga/altera/de5/DE5QGen1x8If64_CLK/constr/DE5QGen1x8If64.sdc Normal file
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# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#----------------------------------------------------------------------------
# Filename: DE5Gen1x8If64.sdc (Qsys)
# Version: 1.00.a
# Verilog Standard: Verilog-2001
# Description: Synopsys Design Constraints for the DE5 board.
# These design constrains constrain the PCIE_REFCLK, and 50 MHz Clock Input
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------------
create_clock -name PCIE_REFCLK -period 10.000 [get_ports {PCIE_REFCLK}]
create_clock -name osc_50MHz -period 20.000 [get_ports {OSC_BANK3D_50MHZ}]
create_clock -name riffa_5_clk -period 200 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_10_clk -period 100 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_25_clk -period 40 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_50_clk -period 20 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[3].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_75_clk -period 13.3 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[4].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_100_clk -period 10 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[5].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_125_clk -period 8 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[6].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_150_clk -period 6.66 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[7].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_175_clk -period 6 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[8].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_200_clk -period 5.33 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[9].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_225_clk -period 4.66 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[10].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_250_clk -period 4 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[11].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name user_clk -period 4 [get_pins {pcie_system_inst|pciegen1x8if64|altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip|coreclkout}]
set_clock_groups -asynchronous -group {user_clk} -group {riffa_5_clk} -group {riffa_10_clk} -group {riffa_25_clk} -group {riffa_50_clk} -group {riffa_75_clk} -group {riffa_100_clk} -group {riffa_125_clk} -group {riffa_150_clk} -group {riffa_175_clk} -group {riffa_200_clk} -group {riffa_225_clk} -group {riffa_250_clk}
################################################################################
# 13.1 Workround for http://www.altera.com/support/kdb/solutions/rd12162013_581.html?GSA_pos=1&WT.oss_r=1&WT.oss=adce_off_r
################################################################################
# set_false_path -to [get_registers *|*.adce_off_r[0]]
# set_false_path -to [get_registers *|*.adce_on_rr[0]]
# set_false_path -to [get_registers *|reset_sync_pldclk_r[*]]
################################################################################
# End Workround
################################################################################
derive_pll_clocks -create_base_clocks
derive_clock_uncertainty
################################################################################
# Imports from Example Design (altera/13.1/ip/altera/altera_pcie/altera_pcie_hip_ast_ed/)
################################################################################
######################################################################
# HIP Soft reset controller SDC constraints (Gen 3 only)
set_false_path -to [get_registers *altpcie_rs_serdes|fifo_err_sync_r[0]]
set_false_path -from [get_registers *sv_xcvr_pipe_native*] -to [get_registers *altpcie_rs_serdes|*]
# HIP testin pins SDC constraints
set_false_path -from [get_pins -compatibility_mode *hip_ctrl*]
######################################################################
# Constraints for CV SIG asynchonous logic
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_in_d0[*]}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_wr_clk}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_req_rd_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_rd_clk_d0}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_ack_wr_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_wr_clk}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_req_rd_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_in_d0[*]}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_rd_clk_d0}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_ack_wr_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|test_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_eqout[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_eqber[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_farend_lf[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_farend_fs[*]}]

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fpga/altera/de5/DE5QGen1x8If64_CLK/hdl/DE5QGen1x8If64.v Normal file
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// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following
// disclaimer in the documentation and/or other materials provided
// with the distribution.
//
// * Neither the name of The Regents of the University of California
// nor the names of its contributors may be used to endorse or
// promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
// UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
// ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
// TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
// USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
// DAMAGE.
// ----------------------------------------------------------------------
//----------------------------------------------------------------------------
// Filename: DE5QGen1x8If64.v
// Version:
// Verilog Standard: Verilog-2001
// Description: Top level module for RIFFA 2.2 reference design for the
// the Altera Stratix V Avalong Streaming Interface to PCI
// Express module and the Terasic DE5 Development Board.
// Author: Dustin Richmond (@darichmond)
//-----------------------------------------------------------------------------
`include "functions.vh"
`include "riffa.vh"
`include "altera.vh"
`timescale 1ps / 1ps
module DE5QGen1x8If64
#(// Number of RIFFA Channels
parameter C_NUM_CHNL = 12,
// Number of PCIe Lanes
parameter C_NUM_LANES = 8,
// Settings from Quartus IP Library
parameter C_PCI_DATA_WIDTH = 64,
parameter C_MAX_PAYLOAD_BYTES = 256,
parameter C_LOG_NUM_TAGS = 5
)
(
// ----------LEDs----------
output [7:0] LED,
// ----------PCIE----------
input PCIE_RESET_N,
input PCIE_REFCLK,
// ----------PCIE Serial RX----------
input [C_NUM_LANES-1:0] PCIE_RX_IN,
// ----------PCIE Serial TX----------
output [C_NUM_LANES-1:0] PCIE_TX_OUT,
// ----------Oscillators----------
input OSC_BANK3D_50MHZ
);
wire npor;
wire pin_perst;
// ----------TL Config interface----------
wire [3:0] tl_cfg_add;
wire [31:0] tl_cfg_ctl;
wire [52:0] tl_cfg_sts;
// ----------Rx/TX Interfaces----------
wire [0:0] rx_st_sop;
wire [0:0] rx_st_eop;
wire [0:0] rx_st_err;
wire [0:0] rx_st_valid;
wire rx_st_ready;
wire [C_PCI_DATA_WIDTH-1:0] rx_st_data;
wire [0:0] rx_st_empty;
wire [0:0] tx_st_sop;
wire [0:0] tx_st_eop;
wire [0:0] tx_st_err;
wire [0:0] tx_st_valid;
wire tx_st_ready;
wire [C_PCI_DATA_WIDTH-1:0] tx_st_data;
wire [0:0] tx_st_empty;
// ----------Clocks & Locks----------
wire pld_clk;
wire coreclkout_hip;
wire refclk;
wire pld_core_ready;
wire reset_status;
wire serdes_pll_locked;
wire riffa_5_clk;
wire riffa_10_clk;
wire riffa_25_clk;
wire riffa_50_clk;
wire riffa_75_clk;
wire riffa_100_clk;
wire riffa_125_clk;
wire riffa_150_clk;
wire riffa_175_clk;
wire riffa_200_clk;
wire riffa_225_clk;
wire riffa_250_clk;
// ----------Interrupt Interfaces----------
wire app_msi_req;
wire app_msi_ack;
// ----------Reconfiguration Controller signals----------
wire mgmt_clk_clk;
wire mgmt_rst_reset;
// ----------Reconfiguration Driver Signals----------
wire reconfig_xcvr_clk;
wire reconfig_xcvr_rst;
wire [7:0] rx_in;
wire [7:0] tx_out;
// ------------Status Interface------------
wire derr_cor_ext_rcv;
wire derr_cor_ext_rpl;
wire derr_rpl;
wire dlup;
wire dlup_exit;
wire ev128ns;
wire ev1us;
wire hotrst_exit;
wire [3:0] int_status;
wire l2_exit;
wire [3:0] lane_act;
wire [4:0] ltssmstate;
wire rx_par_err;
wire [1:0] tx_par_err;
wire cfg_par_err;
wire [7:0] ko_cpl_spc_header;
wire [11:0] ko_cpl_spc_data;
// ----------Clocks----------
assign pld_clk = coreclkout_hip;
assign mgmt_clk_clk = PCIE_REFCLK;
assign reconfig_xcvr_clk = PCIE_REFCLK;
assign refclk = PCIE_REFCLK;
assign pld_core_ready = serdes_pll_locked;
// ----------Resets----------
assign reconfig_xcvr_rst = 1'b0;
assign mgmt_rst_reset = 1'b0;
assign pin_perst = PCIE_RESET_N;
assign npor = PCIE_RESET_N;
// ----------LED's----------
assign LED[7:0] = 8'hff;
QSysDE5QGen1x8If64
pcie_system_inst
(
// Outputs
.rx_st_startofpacket (rx_st_sop[0:0]),
.rx_st_endofpacket (rx_st_eop[0:0]),
.rx_st_valid (rx_st_valid[0:0]),
.rx_st_data (rx_st_data[63:0]),
.tx_st_ready (tx_st_ready),
.pciehip_reset_status (reset_status),
.pciehip_serdes_pll_locked (serdes_pll_locked),
.pciecfg_tl_cfg_add (tl_cfg_add[3:0]),
.pciecfg_tl_cfg_ctl (tl_cfg_ctl[31:0]),
.pciecfg_tl_cfg_sts (tl_cfg_sts[52:0]),
.pciecoreclk_clk (coreclkout_hip),
.pcieserial_tx_out0 (PCIE_TX_OUT[0]),
.pcieserial_tx_out1 (PCIE_TX_OUT[1]),
.pcieserial_tx_out2 (PCIE_TX_OUT[2]),
.pcieserial_tx_out3 (PCIE_TX_OUT[3]),
.pcieserial_tx_out4 (PCIE_TX_OUT[4]),
.pcieserial_tx_out5 (PCIE_TX_OUT[5]),
.pcieserial_tx_out6 (PCIE_TX_OUT[6]),
.pcieserial_tx_out7 (PCIE_TX_OUT[7]),
.pciemsi_app_int_ack (app_int_ack),
.pciemsi_app_msi_ack (app_msi_ack),
.pciestat_derr_cor_ext_rcv (derr_cor_ext_rcv),
.pciestat_derr_cor_ext_rpl (derr_cor_ext_rpl),
.pciestat_derr_rpl (derr_rpl),
.pciestat_dlup (dlup),
.pciestat_dlup_exit (dlup_exit),
.pciestat_ev128ns (ev128ns),
.pciestat_ev1us (ev1us),
.pciestat_hotrst_exit (hotrst_exit),
.pciestat_int_status (int_status),
.pciestat_l2_exit (l2_exit),
.pciestat_lane_act (lane_act),
.pciestat_ltssmstate (ltssmstate),
.pciestat_rx_par_err (rx_par_err),
.pciestat_tx_par_err (tx_par_err),
.pciestat_cfg_par_err (cfg_par_err),
.pciestat_ko_cpl_spc_header (ko_cpl_spc_header),
.pciestat_ko_cpl_spc_data (ko_cpl_spc_data),
.riffa_5_clk (riffa_5_clk),
.riffa_10_clk (riffa_10_clk),
.riffa_25_clk (riffa_25_clk),
.riffa_50_clk (riffa_50_clk),
.riffa_75_clk (riffa_75_clk),
.riffa_100_clk (riffa_100_clk),
.riffa_125_clk (riffa_125_clk),
.riffa_150_clk (riffa_150_clk),
.riffa_175_clk (riffa_175_clk),
.riffa_200_clk (riffa_200_clk),
.riffa_225_clk (riffa_225_clk),
.riffa_250_clk (riffa_250_clk),
// Inputs
.rx_st_ready (rx_st_ready),
.tx_st_startofpacket (tx_st_sop[0:0]),
.tx_st_endofpacket (tx_st_eop[0:0]),
.tx_st_valid (tx_st_valid[0:0]),
.tx_st_data (tx_st_data[63:0]),
.pciehip_pld_core_ready (pld_core_ready),
.pcienpor_npor (npor),
.pcienpor_pin_perst (pin_perst),
.pcierefclk_clk (refclk),
.reconfigrefclk_clk (reconfig_xcvr_clk),
.pciepld_clk (pld_clk),
.reconfigrst_reset (reconfig_xcvr_rst),
.mgmtrst_reset (mgmt_rst_reset),
.mgmtclk_clk (mgmt_clk_clk),
.reconfigpldclk_clk (pld_clk),
.pcieserial_rx_in0 (PCIE_RX_IN[0]),
.pcieserial_rx_in1 (PCIE_RX_IN[1]),
.pcieserial_rx_in2 (PCIE_RX_IN[2]),
.pcieserial_rx_in3 (PCIE_RX_IN[3]),
.pcieserial_rx_in4 (PCIE_RX_IN[4]),
.pcieserial_rx_in5 (PCIE_RX_IN[5]),
.pcieserial_rx_in6 (PCIE_RX_IN[6]),
.pcieserial_rx_in7 (PCIE_RX_IN[7]),
.pciemsi_app_msi_req (app_msi_req),
.drvstat_derr_cor_ext_rcv (derr_cor_ext_rcv),
.drvstat_derr_cor_ext_rpl (derr_cor_ext_rpl),
.drvstat_derr_rpl (derr_rpl),
.drvstat_dlup (dlup),
.drvstat_dlup_exit (dlup_exit),
.drvstat_ev128ns (ev128ns),
.drvstat_ev1us (ev1us),
.drvstat_hotrst_exit (hotrst_exit),
.drvstat_int_status (int_status),
.drvstat_l2_exit (l2_exit),
.drvstat_lane_act (lane_act),
.drvstat_ltssmstate (ltssmstate),
.drvstat_rx_par_err (rx_par_err),
.drvstat_tx_par_err (tx_par_err),
.drvstat_cfg_par_err (cfg_par_err),
.drvstat_ko_cpl_spc_header (ko_cpl_spc_header),
.drvstat_ko_cpl_spc_data (ko_cpl_spc_data),
.pllrefclk_clk (OSC_BANK3D_50MHZ),
.pllrst_reset_n (1'b1));
// -------------------- END ALTERA IP INSTANTIATION --------------------
// -------------------- BEGIN RIFFA INSTANTAION --------------------
// RIFFA channel interface
wire rst_out;
wire [C_NUM_CHNL-1:0] chnl_rx_clk;
wire [C_NUM_CHNL-1:0] chnl_rx;
wire [C_NUM_CHNL-1:0] chnl_rx_ack;
wire [C_NUM_CHNL-1:0] chnl_rx_last;
wire [(C_NUM_CHNL*32)-1:0] chnl_rx_len;
wire [(C_NUM_CHNL*31)-1:0] chnl_rx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_rx_data;
wire [C_NUM_CHNL-1:0] chnl_rx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_rx_data_ren;
wire [C_NUM_CHNL-1:0] chnl_tx_clk;
wire [C_NUM_CHNL-1:0] chnl_tx;
wire [C_NUM_CHNL-1:0] chnl_tx_ack;
wire [C_NUM_CHNL-1:0] chnl_tx_last;
wire [(C_NUM_CHNL*32)-1:0] chnl_tx_len;
wire [(C_NUM_CHNL*31)-1:0] chnl_tx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_tx_data;
wire [C_NUM_CHNL-1:0] chnl_tx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_tx_data_ren;
wire chnl_reset;
wire chnl_clk;
wire riffa_reset;
wire riffa_clk;
assign riffa_reset = reset_status;
assign riffa_clk = pld_clk;
assign chnl_clk = pld_clk;
assign chnl_reset = rst_out;
riffa_wrapper_de5
#(/*AUTOINSTPARAM*/
// Parameters
.C_LOG_NUM_TAGS (C_LOG_NUM_TAGS),
.C_NUM_CHNL (C_NUM_CHNL),
.C_PCI_DATA_WIDTH (C_PCI_DATA_WIDTH),
.C_MAX_PAYLOAD_BYTES (C_MAX_PAYLOAD_BYTES))
riffa
(
// Outputs
.RX_ST_READY (rx_st_ready),
.TX_ST_DATA (tx_st_data[C_PCI_DATA_WIDTH-1:0]),
.TX_ST_VALID (tx_st_valid[0:0]),
.TX_ST_EOP (tx_st_eop[0:0]),
.TX_ST_SOP (tx_st_sop[0:0]),
.TX_ST_EMPTY (tx_st_empty[0:0]),
.APP_MSI_REQ (app_msi_req),
.RST_OUT (rst_out),
.CHNL_RX (chnl_rx[C_NUM_CHNL-1:0]),
.CHNL_RX_LAST (chnl_rx_last[C_NUM_CHNL-1:0]),
.CHNL_RX_LEN (chnl_rx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_RX_OFF (chnl_rx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_RX_DATA (chnl_rx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_RX_DATA_VALID (chnl_rx_data_valid[C_NUM_CHNL-1:0]),
.CHNL_TX_ACK (chnl_tx_ack[C_NUM_CHNL-1:0]),
.CHNL_TX_DATA_REN (chnl_tx_data_ren[C_NUM_CHNL-1:0]),
// Inputs
.RX_ST_DATA (rx_st_data[C_PCI_DATA_WIDTH-1:0]),
.RX_ST_EOP (rx_st_eop[0:0]),
.RX_ST_SOP (rx_st_sop[0:0]),
.RX_ST_VALID (rx_st_valid[0:0]),
.RX_ST_EMPTY (rx_st_empty[0:0]),
.TX_ST_READY (tx_st_ready),
.TL_CFG_CTL (tl_cfg_ctl[`SIG_CFG_CTL_W-1:0]),
.TL_CFG_ADD (tl_cfg_add[`SIG_CFG_ADD_W-1:0]),
.TL_CFG_STS (tl_cfg_sts[`SIG_CFG_STS_W-1:0]),
.KO_CPL_SPC_HEADER (ko_cpl_spc_header[`SIG_KO_CPLH_W-1:0]),
.KO_CPL_SPC_DATA (ko_cpl_spc_data[`SIG_KO_CPLD_W-1:0]),
.APP_MSI_ACK (app_msi_ack),
.PLD_CLK (pld_clk),
.RESET_STATUS (reset_status),
.CHNL_RX_CLK (chnl_rx_clk[C_NUM_CHNL-1:0]),
.CHNL_RX_ACK (chnl_rx_ack[C_NUM_CHNL-1:0]),
.CHNL_RX_DATA_REN (chnl_rx_data_ren[C_NUM_CHNL-1:0]),
.CHNL_TX_CLK (chnl_tx_clk[C_NUM_CHNL-1:0]),
.CHNL_TX (chnl_tx[C_NUM_CHNL-1:0]),
.CHNL_TX_LAST (chnl_tx_last[C_NUM_CHNL-1:0]),
.CHNL_TX_LEN (chnl_tx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_TX_OFF (chnl_tx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_TX_DATA (chnl_tx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_TX_DATA_VALID (chnl_tx_data_valid[C_NUM_CHNL-1:0]));
// -------------------- END RIFFA INSTANTAION --------------------
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_5mhz
(.CLK(riffa_5_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[0]),
.CHNL_RX(chnl_rx[0]),
.CHNL_RX_ACK(chnl_rx_ack[0]),
.CHNL_RX_LAST(chnl_rx_last[0]),
.CHNL_RX_LEN(chnl_rx_len[32*0 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*0 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[0]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[0]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[0]),
.CHNL_TX(chnl_tx[0]),
.CHNL_TX_ACK(chnl_tx_ack[0]),
.CHNL_TX_LAST(chnl_tx_last[0]),
.CHNL_TX_LEN(chnl_tx_len[32*0 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*0 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[0]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[0]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_10mhz
(.CLK(riffa_10_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[1]),
.CHNL_RX(chnl_rx[1]),
.CHNL_RX_ACK(chnl_rx_ack[1]),
.CHNL_RX_LAST(chnl_rx_last[1]),
.CHNL_RX_LEN(chnl_rx_len[32*1 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*1 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[1]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[1]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[1]),
.CHNL_TX(chnl_tx[1]),
.CHNL_TX_ACK(chnl_tx_ack[1]),
.CHNL_TX_LAST(chnl_tx_last[1]),
.CHNL_TX_LEN(chnl_tx_len[32*1 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*1 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[1]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[1]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_25mhz
(.CLK(riffa_25_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[2]),
.CHNL_RX(chnl_rx[2]),
.CHNL_RX_ACK(chnl_rx_ack[2]),
.CHNL_RX_LAST(chnl_rx_last[2]),
.CHNL_RX_LEN(chnl_rx_len[32*2 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*2 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[2]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[2]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[2]),
.CHNL_TX(chnl_tx[2]),
.CHNL_TX_ACK(chnl_tx_ack[2]),
.CHNL_TX_LAST(chnl_tx_last[2]),
.CHNL_TX_LEN(chnl_tx_len[32*2 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*2 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[2]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[2]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_50mhz
(.CLK(riffa_50_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[3]),
.CHNL_RX(chnl_rx[3]),
.CHNL_RX_ACK(chnl_rx_ack[3]),
.CHNL_RX_LAST(chnl_rx_last[3]),
.CHNL_RX_LEN(chnl_rx_len[32*3 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*3 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[3]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[3]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[3]),
.CHNL_TX(chnl_tx[3]),
.CHNL_TX_ACK(chnl_tx_ack[3]),
.CHNL_TX_LAST(chnl_tx_last[3]),
.CHNL_TX_LEN(chnl_tx_len[32*3 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*3 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[3]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[3]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_75mhz
(.CLK(riffa_75_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[4]),
.CHNL_RX(chnl_rx[4]),
.CHNL_RX_ACK(chnl_rx_ack[4]),
.CHNL_RX_LAST(chnl_rx_last[4]),
.CHNL_RX_LEN(chnl_rx_len[32*4 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*4 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[4]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[4]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[4]),
.CHNL_TX(chnl_tx[4]),
.CHNL_TX_ACK(chnl_tx_ack[4]),
.CHNL_TX_LAST(chnl_tx_last[4]),
.CHNL_TX_LEN(chnl_tx_len[32*4 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*4 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[4]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[4]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_100mhz
(.CLK(riffa_100_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[5]),
.CHNL_RX(chnl_rx[5]),
.CHNL_RX_ACK(chnl_rx_ack[5]),
.CHNL_RX_LAST(chnl_rx_last[5]),
.CHNL_RX_LEN(chnl_rx_len[32*5 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*5 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[5]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[5]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[5]),
.CHNL_TX(chnl_tx[5]),
.CHNL_TX_ACK(chnl_tx_ack[5]),
.CHNL_TX_LAST(chnl_tx_last[5]),
.CHNL_TX_LEN(chnl_tx_len[32*5 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*5 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[5]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[5]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_125mhz
(.CLK(riffa_125_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[6]),
.CHNL_RX(chnl_rx[6]),
.CHNL_RX_ACK(chnl_rx_ack[6]),
.CHNL_RX_LAST(chnl_rx_last[6]),
.CHNL_RX_LEN(chnl_rx_len[32*6 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*6 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[6]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[6]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[6]),
.CHNL_TX(chnl_tx[6]),
.CHNL_TX_ACK(chnl_tx_ack[6]),
.CHNL_TX_LAST(chnl_tx_last[6]),
.CHNL_TX_LEN(chnl_tx_len[32*6 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*6 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[6]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[6]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_150mhz
(.CLK(riffa_150_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[7]),
.CHNL_RX(chnl_rx[7]),
.CHNL_RX_ACK(chnl_rx_ack[7]),
.CHNL_RX_LAST(chnl_rx_last[7]),
.CHNL_RX_LEN(chnl_rx_len[32*7 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*7 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[7]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[7]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[7]),
.CHNL_TX(chnl_tx[7]),
.CHNL_TX_ACK(chnl_tx_ack[7]),
.CHNL_TX_LAST(chnl_tx_last[7]),
.CHNL_TX_LEN(chnl_tx_len[32*7 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*7 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[7]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[7]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_175mhz
(.CLK(riffa_175_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[8]),
.CHNL_RX(chnl_rx[8]),
.CHNL_RX_ACK(chnl_rx_ack[8]),
.CHNL_RX_LAST(chnl_rx_last[8]),
.CHNL_RX_LEN(chnl_rx_len[32*8 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*8 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[8]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[8]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[8]),
.CHNL_TX(chnl_tx[8]),
.CHNL_TX_ACK(chnl_tx_ack[8]),
.CHNL_TX_LAST(chnl_tx_last[8]),
.CHNL_TX_LEN(chnl_tx_len[32*8 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*8 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[8]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[8]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_200mhz
(.CLK(riffa_200_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[9]),
.CHNL_RX(chnl_rx[9]),
.CHNL_RX_ACK(chnl_rx_ack[9]),
.CHNL_RX_LAST(chnl_rx_last[9]),
.CHNL_RX_LEN(chnl_rx_len[32*9 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*9 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[9]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[9]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[9]),
.CHNL_TX(chnl_tx[9]),
.CHNL_TX_ACK(chnl_tx_ack[9]),
.CHNL_TX_LAST(chnl_tx_last[9]),
.CHNL_TX_LEN(chnl_tx_len[32*9 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*9 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[9]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[9]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_225mhz
(.CLK(riffa_225_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[10]),
.CHNL_RX(chnl_rx[10]),
.CHNL_RX_ACK(chnl_rx_ack[10]),
.CHNL_RX_LAST(chnl_rx_last[10]),
.CHNL_RX_LEN(chnl_rx_len[32*10 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*10 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[10]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[10]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[10]),
.CHNL_TX(chnl_tx[10]),
.CHNL_TX_ACK(chnl_tx_ack[10]),
.CHNL_TX_LAST(chnl_tx_last[10]),
.CHNL_TX_LEN(chnl_tx_len[32*10 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*10 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[10]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[10]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_250mhz
(.CLK(riffa_250_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[11]),
.CHNL_RX(chnl_rx[11]),
.CHNL_RX_ACK(chnl_rx_ack[11]),
.CHNL_RX_LAST(chnl_rx_last[11]),
.CHNL_RX_LEN(chnl_rx_len[32*11 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*11 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[11]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[11]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[11]),
.CHNL_TX(chnl_tx[11]),
.CHNL_TX_ACK(chnl_tx_ack[11]),
.CHNL_TX_LAST(chnl_tx_last[11]),
.CHNL_TX_LEN(chnl_tx_len[32*11 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*11 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[11]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[11]));
endmodule

883
fpga/altera/de5/DE5QGen1x8If64_CLK/ip/QSysDE5QGen1x8If64.qsys Normal file
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@ -0,0 +1,883 @@
<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element PCIeGen1x8If64
{
datum _sortIndex
{
value = "1";
type = "int";
}
}
element XCVRCtrlGen1x8
{
datum _sortIndex
{
value = "2";
type = "int";
}
}
element XCVRDrvGen1x8
{
datum _sortIndex
{
value = "3";
type = "int";
}
}
element clk_0
{
datum _sortIndex
{
value = "0";
type = "int";
}
}
element pll_0
{
datum _sortIndex
{
value = "4";
type = "int";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="5SGXEA7N2F45C2" />
<parameter name="deviceFamily" value="Stratix V" />
<parameter name="deviceSpeedGrade" value="2_H2" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName" value="" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="" />
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface
name="drvstat"
internal="XCVRDrvGen1x8.hip_status_drv"
type="conduit"
dir="end" />
<interface
name="mgmtclk"
internal="XCVRCtrlGen1x8.mgmt_clk_clk"
type="clock"
dir="end" />
<interface
name="mgmtrst"
internal="XCVRCtrlGen1x8.mgmt_rst_reset"
type="reset"
dir="end" />
<interface
name="pciecfg"
internal="PCIeGen1x8If64.config_tl"
type="conduit"
dir="end" />
<interface
name="pciecoreclk"
internal="PCIeGen1x8If64.coreclkout_hip"
type="clock"
dir="start" />
<interface
name="pciehip"
internal="PCIeGen1x8If64.hip_rst"
type="conduit"
dir="end" />
<interface
name="pciemsi"
internal="PCIeGen1x8If64.int_msi"
type="conduit"
dir="end" />
<interface
name="pcienpor"
internal="PCIeGen1x8If64.npor"
type="conduit"
dir="end" />
<interface
name="pciepld"
internal="PCIeGen1x8If64.pld_clk"
type="clock"
dir="end" />
<interface
name="pcierefclk"
internal="PCIeGen1x8If64.refclk"
type="clock"
dir="end" />
<interface
name="pcieserial"
internal="PCIeGen1x8If64.hip_serial"
type="conduit"
dir="end" />
<interface
name="pciestat"
internal="PCIeGen1x8If64.hip_status"
type="conduit"
dir="end" />
<interface name="pllrefclk" internal="clk_0.clk_in" type="clock" dir="end" />
<interface name="pllrst" internal="clk_0.clk_in_reset" type="reset" dir="end" />
<interface
name="reconfigpldclk"
internal="XCVRDrvGen1x8.pld_clk"
type="clock"
dir="end" />
<interface
name="reconfigrefclk"
internal="XCVRDrvGen1x8.reconfig_xcvr_clk"
type="clock"
dir="end" />
<interface
name="reconfigrst"
internal="XCVRDrvGen1x8.reconfig_xcvr_rst"
type="reset"
dir="end" />
<interface name="riffa_10" internal="pll_0.outclk1" type="clock" dir="start" />
<interface name="riffa_100" internal="pll_0.outclk5" type="clock" dir="start" />
<interface name="riffa_125" internal="pll_0.outclk6" type="clock" dir="start" />
<interface name="riffa_150" internal="pll_0.outclk7" type="clock" dir="start" />
<interface name="riffa_175" internal="pll_0.outclk8" type="clock" dir="start" />
<interface name="riffa_200" internal="pll_0.outclk9" type="clock" dir="start" />
<interface name="riffa_225" internal="pll_0.outclk10" type="clock" dir="start" />
<interface name="riffa_25" internal="pll_0.outclk2" type="clock" dir="start" />
<interface name="riffa_250" internal="pll_0.outclk11" type="clock" dir="start" />
<interface name="riffa_5" internal="pll_0.outclk0" type="clock" dir="start" />
<interface name="riffa_50" internal="pll_0.outclk3" type="clock" dir="start" />
<interface name="riffa_75" internal="pll_0.outclk4" type="clock" dir="start" />
<interface
name="rx_st"
internal="PCIeGen1x8If64.rx_st"
type="avalon_streaming"
dir="start" />
<interface
name="tx_st"
internal="PCIeGen1x8If64.tx_st"
type="avalon_streaming"
dir="end" />
<module
name="PCIeGen1x8If64"
kind="altera_pcie_sv_hip_ast"
version="16.0"
enabled="1">
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
<parameter name="advanced_default_hwtcl_atomic_malformed" value="true" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_32bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_64bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_routing" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_ssid_support" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_vga_enable" value="false" />
<parameter name="advanced_default_hwtcl_bypass_cdc" value="false" />
<parameter name="advanced_default_hwtcl_cas_completer_128bit" value="false" />
<parameter name="advanced_default_hwtcl_cdc_dummy_insert_limit" value="11" />
<parameter name="advanced_default_hwtcl_d0_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_support" value="false" />
<parameter name="advanced_default_hwtcl_d2_pme" value="false" />
<parameter name="advanced_default_hwtcl_d2_support" value="false" />
<parameter name="advanced_default_hwtcl_d3_cold_pme" value="false" />
<parameter name="advanced_default_hwtcl_d3_hot_pme" value="false" />
<parameter name="advanced_default_hwtcl_data_pack_rx" value="disable" />
<parameter name="advanced_default_hwtcl_deskew_comma" value="com_deskw" />
<parameter name="advanced_default_hwtcl_device_number" value="0" />
<parameter name="advanced_default_hwtcl_disable_link_x2_support" value="false" />
<parameter name="advanced_default_hwtcl_disable_snoop_packet" value="false" />
<parameter name="advanced_default_hwtcl_ei_delay_powerdown_count" value="10" />
<parameter name="advanced_default_hwtcl_eie_before_nfts_count" value="4" />
<parameter
name="advanced_default_hwtcl_enable_adapter_half_rate_mode"
value="false" />
<parameter name="advanced_default_hwtcl_enable_l1_aspm" value="false" />
<parameter name="advanced_default_hwtcl_enable_rx_buffer_checking" value="false" />
<parameter name="advanced_default_hwtcl_extended_format_field" value="false" />
<parameter name="advanced_default_hwtcl_extended_tag_reset" value="false" />
<parameter name="advanced_default_hwtcl_fc_init_timer" value="1024" />
<parameter name="advanced_default_hwtcl_flow_control_timeout_count" value="200" />
<parameter name="advanced_default_hwtcl_flow_control_update_count" value="30" />
<parameter name="advanced_default_hwtcl_flr_capability" value="false" />
<parameter name="advanced_default_hwtcl_gen2_diffclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_gen2_sameclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_hot_plug_support" value="0" />
<parameter name="advanced_default_hwtcl_interrupt_pin" value="inta" />
<parameter name="advanced_default_hwtcl_l01_entry_latency" value="31" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_diffclock" value="6" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_sameclock" value="6" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_diffclock" value="0" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_sameclock" value="0" />
<parameter name="advanced_default_hwtcl_low_priority_vc" value="single_vc" />
<parameter name="advanced_default_hwtcl_ltr_mechanism" value="false" />
<parameter name="advanced_default_hwtcl_ltssm_1ms_timeout" value="disable" />
<parameter name="advanced_default_hwtcl_ltssm_freqlocked_check" value="disable" />
<parameter name="advanced_default_hwtcl_maximum_current" value="0" />
<parameter name="advanced_default_hwtcl_no_command_completed" value="true" />
<parameter name="advanced_default_hwtcl_no_soft_reset" value="false" />
<parameter name="advanced_default_hwtcl_pclk_out_sel" value="pclk" />
<parameter name="advanced_default_hwtcl_pipex1_debug_sel" value="disable" />
<parameter name="advanced_default_hwtcl_register_pipe_signals" value="false" />
<parameter name="advanced_default_hwtcl_reserved_debug" value="0" />
<parameter
name="advanced_default_hwtcl_retry_buffer_last_active_address"
value="2047" />
<parameter name="advanced_default_hwtcl_rx_l0s_count_idl" value="0" />
<parameter name="advanced_default_hwtcl_set_l0s" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_gen3_count" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_schedule_count" value="0" />
<parameter name="advanced_default_hwtcl_ssid" value="0" />
<parameter name="advanced_default_hwtcl_ssvid" value="0" />
<parameter name="advanced_default_hwtcl_tph_completer" value="false" />
<parameter name="advanced_default_hwtcl_tx_cdc_almost_empty" value="5" />
<parameter name="advanced_default_hwtcl_vc0_clk_enable" value="true" />
<parameter name="advanced_default_hwtcl_wrong_device_id" value="disable" />
<parameter name="advanced_default_parameter_override" value="0" />
<parameter name="ast_width_hwtcl" value="Avalon-ST 64-bit" />
<parameter name="bar0_size_mask_hwtcl" value="10" />
<parameter name="bar0_type_hwtcl" value="2" />
<parameter name="bar1_size_mask_hwtcl" value="0" />
<parameter name="bar1_type_hwtcl" value="0" />
<parameter name="bar2_size_mask_hwtcl" value="0" />
<parameter name="bar2_type_hwtcl" value="0" />
<parameter name="bar3_size_mask_hwtcl" value="0" />
<parameter name="bar3_type_hwtcl" value="0" />
<parameter name="bar4_size_mask_hwtcl" value="0" />
<parameter name="bar4_type_hwtcl" value="0" />
<parameter name="bar5_size_mask_hwtcl" value="0" />
<parameter name="bar5_type_hwtcl" value="0" />
<parameter name="change_deemphasis_hwtcl" value="0" />
<parameter name="class_code_hwtcl" value="0" />
<parameter name="completion_timeout_hwtcl" value="ABCD" />
<parameter name="design_environment_hwtcl" value="QSYS" />
<parameter name="device_id_hwtcl" value="1" />
<parameter name="dll_active_report_support_hwtcl" value="0" />
<parameter name="ecrc_check_capable_hwtcl" value="0" />
<parameter name="ecrc_gen_capable_hwtcl" value="0" />
<parameter name="enable_completion_timeout_disable_hwtcl" value="1" />
<parameter name="enable_function_msix_support_hwtcl" value="0" />
<parameter name="enable_pcisigtest_hwtcl" value="0" />
<parameter name="enable_pipe32_phyip_ser_driver_hwtcl" value="0" />
<parameter name="enable_pipe32_sim_hwtcl" value="0" />
<parameter name="enable_power_on_rst_pulse_hwtcl" value="0" />
<parameter name="enable_slot_register_hwtcl" value="0" />
<parameter name="enable_tl_only_sim_hwtcl" value="0" />
<parameter name="endpoint_l0_latency_hwtcl" value="0" />
<parameter name="endpoint_l1_latency_hwtcl" value="0" />
<parameter name="expansion_base_address_register_hwtcl" value="0" />
<parameter name="extend_tag_field_hwtcl" value="64" />
<parameter name="fixed_preset_on" value="0" />
<parameter name="force_hrc" value="0" />
<parameter name="force_src" value="0" />
<parameter name="full_swing_hwtcl" value="35" />
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen1 (2.5 Gbps)" />
<parameter name="gen3_coeff_10_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_10_hwtcl" value="0" />
<parameter name="gen3_coeff_10_nxtber_less_hwtcl">g3_coeff_10_nxtber_less</parameter>
<parameter name="gen3_coeff_10_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_10_nxtber_more_hwtcl">g3_coeff_10_nxtber_more</parameter>
<parameter name="gen3_coeff_10_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_10_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_10_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_10_sel_hwtcl" value="preset_10" />
<parameter name="gen3_coeff_11_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_11_hwtcl" value="0" />
<parameter name="gen3_coeff_11_nxtber_less_hwtcl">g3_coeff_11_nxtber_less</parameter>
<parameter name="gen3_coeff_11_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_11_nxtber_more_hwtcl">g3_coeff_11_nxtber_more</parameter>
<parameter name="gen3_coeff_11_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_11_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_11_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_11_sel_hwtcl" value="preset_11" />
<parameter name="gen3_coeff_12_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_12_hwtcl" value="0" />
<parameter name="gen3_coeff_12_nxtber_less_hwtcl">g3_coeff_12_nxtber_less</parameter>
<parameter name="gen3_coeff_12_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_12_nxtber_more_hwtcl">g3_coeff_12_nxtber_more</parameter>
<parameter name="gen3_coeff_12_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_12_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_12_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_12_sel_hwtcl" value="preset_12" />
<parameter name="gen3_coeff_13_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_13_hwtcl" value="0" />
<parameter name="gen3_coeff_13_nxtber_less_hwtcl">g3_coeff_13_nxtber_less</parameter>
<parameter name="gen3_coeff_13_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_13_nxtber_more_hwtcl">g3_coeff_13_nxtber_more</parameter>
<parameter name="gen3_coeff_13_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_13_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_13_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_13_sel_hwtcl" value="preset_13" />
<parameter name="gen3_coeff_14_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_14_hwtcl" value="0" />
<parameter name="gen3_coeff_14_nxtber_less_hwtcl">g3_coeff_14_nxtber_less</parameter>
<parameter name="gen3_coeff_14_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_14_nxtber_more_hwtcl">g3_coeff_14_nxtber_more</parameter>
<parameter name="gen3_coeff_14_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_14_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_14_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_14_sel_hwtcl" value="preset_14" />
<parameter name="gen3_coeff_15_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_15_hwtcl" value="0" />
<parameter name="gen3_coeff_15_nxtber_less_hwtcl">g3_coeff_15_nxtber_less</parameter>
<parameter name="gen3_coeff_15_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_15_nxtber_more_hwtcl">g3_coeff_15_nxtber_more</parameter>
<parameter name="gen3_coeff_15_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_15_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_15_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_15_sel_hwtcl" value="preset_15" />
<parameter name="gen3_coeff_16_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_16_hwtcl" value="0" />
<parameter name="gen3_coeff_16_nxtber_less_hwtcl">g3_coeff_16_nxtber_less</parameter>
<parameter name="gen3_coeff_16_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_16_nxtber_more_hwtcl">g3_coeff_16_nxtber_more</parameter>
<parameter name="gen3_coeff_16_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_16_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_16_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_16_sel_hwtcl" value="preset_16" />
<parameter name="gen3_coeff_17_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_17_hwtcl" value="0" />
<parameter name="gen3_coeff_17_nxtber_less_hwtcl">g3_coeff_17_nxtber_less</parameter>
<parameter name="gen3_coeff_17_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_17_nxtber_more_hwtcl">g3_coeff_17_nxtber_more</parameter>
<parameter name="gen3_coeff_17_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_17_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_17_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_17_sel_hwtcl" value="preset_17" />
<parameter name="gen3_coeff_18_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_18_hwtcl" value="0" />
<parameter name="gen3_coeff_18_nxtber_less_hwtcl">g3_coeff_18_nxtber_less</parameter>
<parameter name="gen3_coeff_18_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_18_nxtber_more_hwtcl">g3_coeff_18_nxtber_more</parameter>
<parameter name="gen3_coeff_18_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_18_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_18_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_18_sel_hwtcl" value="preset_18" />
<parameter name="gen3_coeff_19_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_19_hwtcl" value="0" />
<parameter name="gen3_coeff_19_nxtber_less_hwtcl">g3_coeff_19_nxtber_less</parameter>
<parameter name="gen3_coeff_19_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_19_nxtber_more_hwtcl">g3_coeff_19_nxtber_more</parameter>
<parameter name="gen3_coeff_19_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_19_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_19_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_19_sel_hwtcl" value="preset_19" />
<parameter name="gen3_coeff_1_ber_meas_hwtcl" value="2" />
<parameter name="gen3_coeff_1_hwtcl" value="7" />
<parameter name="gen3_coeff_1_nxtber_less_hwtcl">g3_coeff_1_nxtber_less</parameter>
<parameter name="gen3_coeff_1_nxtber_less_ptr_hwtcl" value="1" />
<parameter name="gen3_coeff_1_nxtber_more_hwtcl">g3_coeff_1_nxtber_more</parameter>
<parameter name="gen3_coeff_1_nxtber_more_ptr_hwtcl" value="1" />
<parameter name="gen3_coeff_1_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_1_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_1_sel_hwtcl" value="preset_1" />
<parameter name="gen3_coeff_20_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_20_hwtcl" value="0" />
<parameter name="gen3_coeff_20_nxtber_less_hwtcl">g3_coeff_20_nxtber_less</parameter>
<parameter name="gen3_coeff_20_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_20_nxtber_more_hwtcl">g3_coeff_20_nxtber_more</parameter>
<parameter name="gen3_coeff_20_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_20_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_20_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_20_sel_hwtcl" value="preset_20" />
<parameter name="gen3_coeff_21_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_21_hwtcl" value="0" />
<parameter name="gen3_coeff_21_nxtber_less_hwtcl">g3_coeff_21_nxtber_less</parameter>
<parameter name="gen3_coeff_21_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_21_nxtber_more_hwtcl">g3_coeff_21_nxtber_more</parameter>
<parameter name="gen3_coeff_21_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_21_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_21_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_21_sel_hwtcl" value="preset_21" />
<parameter name="gen3_coeff_22_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_22_hwtcl" value="0" />
<parameter name="gen3_coeff_22_nxtber_less_hwtcl">g3_coeff_22_nxtber_less</parameter>
<parameter name="gen3_coeff_22_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_22_nxtber_more_hwtcl">g3_coeff_22_nxtber_more</parameter>
<parameter name="gen3_coeff_22_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_22_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_22_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_22_sel_hwtcl" value="preset_22" />
<parameter name="gen3_coeff_23_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_23_hwtcl" value="0" />
<parameter name="gen3_coeff_23_nxtber_less_hwtcl">g3_coeff_23_nxtber_less</parameter>
<parameter name="gen3_coeff_23_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_23_nxtber_more_hwtcl">g3_coeff_23_nxtber_more</parameter>
<parameter name="gen3_coeff_23_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_23_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_23_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_23_sel_hwtcl" value="preset_23" />
<parameter name="gen3_coeff_24_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_24_hwtcl" value="0" />
<parameter name="gen3_coeff_24_nxtber_less_hwtcl">g3_coeff_24_nxtber_less</parameter>
<parameter name="gen3_coeff_24_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_24_nxtber_more_hwtcl">g3_coeff_24_nxtber_more</parameter>
<parameter name="gen3_coeff_24_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_24_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_24_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_24_sel_hwtcl" value="preset_24" />
<parameter name="gen3_coeff_2_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_2_hwtcl" value="0" />
<parameter name="gen3_coeff_2_nxtber_less_hwtcl">g3_coeff_2_nxtber_less</parameter>
<parameter name="gen3_coeff_2_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_2_nxtber_more_hwtcl">g3_coeff_2_nxtber_more</parameter>
<parameter name="gen3_coeff_2_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_2_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_2_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_2_sel_hwtcl" value="preset_2" />
<parameter name="gen3_coeff_3_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_3_hwtcl" value="0" />
<parameter name="gen3_coeff_3_nxtber_less_hwtcl">g3_coeff_3_nxtber_less</parameter>
<parameter name="gen3_coeff_3_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_3_nxtber_more_hwtcl">g3_coeff_3_nxtber_more</parameter>
<parameter name="gen3_coeff_3_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_3_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_3_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_3_sel_hwtcl" value="preset_3" />
<parameter name="gen3_coeff_4_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_4_hwtcl" value="0" />
<parameter name="gen3_coeff_4_nxtber_less_hwtcl">g3_coeff_4_nxtber_less</parameter>
<parameter name="gen3_coeff_4_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_4_nxtber_more_hwtcl">g3_coeff_4_nxtber_more</parameter>
<parameter name="gen3_coeff_4_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_4_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_4_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_4_sel_hwtcl" value="preset_4" />
<parameter name="gen3_coeff_5_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_5_hwtcl" value="0" />
<parameter name="gen3_coeff_5_nxtber_less_hwtcl">g3_coeff_5_nxtber_less</parameter>
<parameter name="gen3_coeff_5_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_5_nxtber_more_hwtcl">g3_coeff_5_nxtber_more</parameter>
<parameter name="gen3_coeff_5_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_5_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_5_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_5_sel_hwtcl" value="preset_5" />
<parameter name="gen3_coeff_6_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_6_hwtcl" value="0" />
<parameter name="gen3_coeff_6_nxtber_less_hwtcl">g3_coeff_6_nxtber_less</parameter>
<parameter name="gen3_coeff_6_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_6_nxtber_more_hwtcl">g3_coeff_6_nxtber_more</parameter>
<parameter name="gen3_coeff_6_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_6_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_6_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_6_sel_hwtcl" value="preset_6" />
<parameter name="gen3_coeff_7_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_7_hwtcl" value="0" />
<parameter name="gen3_coeff_7_nxtber_less_hwtcl">g3_coeff_7_nxtber_less</parameter>
<parameter name="gen3_coeff_7_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_7_nxtber_more_hwtcl">g3_coeff_7_nxtber_more</parameter>
<parameter name="gen3_coeff_7_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_7_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_7_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_7_sel_hwtcl" value="preset_7" />
<parameter name="gen3_coeff_8_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_8_hwtcl" value="0" />
<parameter name="gen3_coeff_8_nxtber_less_hwtcl">g3_coeff_8_nxtber_less</parameter>
<parameter name="gen3_coeff_8_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_8_nxtber_more_hwtcl">g3_coeff_8_nxtber_more</parameter>
<parameter name="gen3_coeff_8_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_8_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_8_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_8_sel_hwtcl" value="preset_8" />
<parameter name="gen3_coeff_9_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_9_hwtcl" value="0" />
<parameter name="gen3_coeff_9_nxtber_less_hwtcl">g3_coeff_9_nxtber_less</parameter>
<parameter name="gen3_coeff_9_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_9_nxtber_more_hwtcl">g3_coeff_9_nxtber_more</parameter>
<parameter name="gen3_coeff_9_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_9_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_9_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_9_sel_hwtcl" value="preset_9" />
<parameter name="gen3_full_swing_hwtcl" value="35" />
<parameter name="gen3_low_freq_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_10_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_11_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_1_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_2_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_3_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_4_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_5_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_6_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_7_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_8_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_9_hwtcl" value="0" />
<parameter name="gen3_rxfreqlock_counter_hwtcl" value="0" />
<parameter name="hip_reconfig_hwtcl" value="0" />
<parameter name="hip_tag_checking_hwtcl" value="1" />
<parameter name="hwtcl_override_g2_txvod" value="1" />
<parameter name="hwtcl_override_g3rxcoef" value="0" />
<parameter name="hwtcl_override_g3txcoef" value="0" />
<parameter name="in_cvp_mode_hwtcl" value="0" />
<parameter name="io_window_addr_width_hwtcl" value="0" />
<parameter name="lane_mask_hwtcl" value="x8" />
<parameter name="low_latency_mode_hwtcl" value="0" />
<parameter name="max_payload_size_hwtcl" value="256" />
<parameter name="msi_64bit_addressing_capable_hwtcl" value="true" />
<parameter name="msi_masking_capable_hwtcl" value="false" />
<parameter name="msi_multi_message_capable_hwtcl" value="1" />
<parameter name="msi_support_hwtcl" value="true" />
<parameter name="msix_pba_bir_hwtcl" value="0" />
<parameter name="msix_pba_offset_hwtcl" value="0" />
<parameter name="msix_table_bir_hwtcl" value="0" />
<parameter name="msix_table_offset_hwtcl" value="0" />
<parameter name="msix_table_size_hwtcl" value="0" />
<parameter name="multiple_packets_per_cycle_hwtcl" value="0" />
<parameter name="override_rxbuffer_cred_preset" value="0" />
<parameter name="override_tbpartner_driver_setting_hwtcl" value="0" />
<parameter name="pcie_inspector_hwtcl" value="0" />
<parameter name="pcie_qsys" value="1" />
<parameter name="pcie_spec_version_hwtcl" value="2.1" />
<parameter name="pll_refclk_freq_hwtcl" value="100 MHz" />
<parameter name="port_link_number_hwtcl" value="1" />
<parameter name="port_type_hwtcl" value="Native endpoint" />
<parameter name="prefetchable_mem_window_addr_width_hwtcl" value="0" />
<parameter name="revision_id_hwtcl" value="1" />
<parameter name="rpre_emph_a_val_hwtcl" value="9" />
<parameter name="rpre_emph_b_val_hwtcl" value="0" />
<parameter name="rpre_emph_c_val_hwtcl" value="16" />
<parameter name="rpre_emph_d_val_hwtcl" value="13" />
<parameter name="rpre_emph_e_val_hwtcl" value="5" />
<parameter name="rvod_sel_a_val_hwtcl" value="42" />
<parameter name="rvod_sel_b_val_hwtcl" value="38" />
<parameter name="rvod_sel_c_val_hwtcl" value="38" />
<parameter name="rvod_sel_d_val_hwtcl" value="43" />
<parameter name="rvod_sel_e_val_hwtcl" value="15" />
<parameter name="rxbuffer_rxreq_hwtcl" value="Minimum" />
<parameter name="serial_sim_hwtcl" value="1" />
<parameter name="set_pld_clk_x1_625MHz_hwtcl" value="0" />
<parameter name="slot_number_hwtcl" value="0" />
<parameter name="slot_power_limit_hwtcl" value="0" />
<parameter name="slot_power_scale_hwtcl" value="0" />
<parameter name="slotclkcfg_hwtcl" value="1" />
<parameter name="subsystem_device_id_hwtcl" value="0" />
<parameter name="subsystem_vendor_id_hwtcl" value="0" />
<parameter name="surprise_down_error_support_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw0_hwtcl" value="2049" />
<parameter name="tlp_insp_trg_dw1_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw2_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw3_hwtcl" value="0" />
<parameter name="tlp_inspector_hwtcl" value="0" />
<parameter name="tlp_inspector_use_signal_probe_hwtcl" value="0" />
<parameter name="track_rxfc_cplbuf_ovf_hwtcl" value="0" />
<parameter name="use_aer_hwtcl" value="0" />
<parameter name="use_ast_parity" value="0" />
<parameter name="use_atx_pll_hwtcl" value="0" />
<parameter name="use_config_bypass_hwtcl" value="0" />
<parameter name="use_crc_forwarding_hwtcl" value="0" />
<parameter name="use_cvp_update_core_pof_hwtcl" value="0" />
<parameter name="use_pci_ext_hwtcl" value="0" />
<parameter name="use_pcie_ext_hwtcl" value="0" />
<parameter name="use_rx_st_be_hwtcl" value="0" />
<parameter name="use_tx_cons_cred_sel_hwtcl" value="0" />
<parameter name="user_id_hwtcl" value="0" />
<parameter name="vendor_id_hwtcl" value="4466" />
<parameter name="vsec_id_hwtcl" value="40960" />
<parameter name="vsec_rev_hwtcl" value="0" />
</module>
<module
name="XCVRCtrlGen1x8"
kind="alt_xcvr_reconfig"
version="16.0"
enabled="1">
<parameter name="ber_en" value="0" />
<parameter name="device_family" value="Stratix V" />
<parameter name="enable_adce" value="0" />
<parameter name="enable_analog" value="1" />
<parameter name="enable_dcd" value="0" />
<parameter name="enable_dcd_power_up" value="1" />
<parameter name="enable_dfe" value="0" />
<parameter name="enable_eyemon" value="0" />
<parameter name="enable_mif" value="0" />
<parameter name="enable_offset" value="1" />
<parameter name="gui_cal_status_port" value="false" />
<parameter name="gui_enable_pll" value="0" />
<parameter name="gui_split_sizes" value="" />
<parameter name="number_of_reconfig_interfaces" value="10" />
</module>
<module
name="XCVRDrvGen1x8"
kind="altera_pcie_reconfig_driver"
version="16.0"
enabled="1">
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
<parameter name="enable_cal_busy_hwtcl" value="0" />
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen1 (2.5 Gbps)" />
<parameter name="number_of_reconfig_interfaces" value="10" />
</module>
<module name="clk_0" kind="clock_source" version="16.0" enabled="1">
<parameter name="clockFrequency" value="50000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module name="pll_0" kind="altera_pll" version="16.0" enabled="1">
<parameter name="debug_print_output" value="false" />
<parameter name="debug_use_rbc_taf_method" value="false" />
<parameter name="device" value="5SGXEA7N2F45C2" />
<parameter name="device_family" value="Stratix V" />
<parameter name="gui_active_clk" value="false" />
<parameter name="gui_actual_output_clock_frequency0" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency1" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency10" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency11" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency12" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency13" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency14" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency15" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency16" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency17" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency2" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency3" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency4" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency5" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency6" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency7" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency8" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency9" value="0 MHz" />
<parameter name="gui_actual_phase_shift0" value="0" />
<parameter name="gui_actual_phase_shift1" value="0" />
<parameter name="gui_actual_phase_shift10" value="0" />
<parameter name="gui_actual_phase_shift11" value="0" />
<parameter name="gui_actual_phase_shift12" value="0" />
<parameter name="gui_actual_phase_shift13" value="0" />
<parameter name="gui_actual_phase_shift14" value="0" />
<parameter name="gui_actual_phase_shift15" value="0" />
<parameter name="gui_actual_phase_shift16" value="0" />
<parameter name="gui_actual_phase_shift17" value="0" />
<parameter name="gui_actual_phase_shift2" value="0" />
<parameter name="gui_actual_phase_shift3" value="0" />
<parameter name="gui_actual_phase_shift4" value="0" />
<parameter name="gui_actual_phase_shift5" value="0" />
<parameter name="gui_actual_phase_shift6" value="0" />
<parameter name="gui_actual_phase_shift7" value="0" />
<parameter name="gui_actual_phase_shift8" value="0" />
<parameter name="gui_actual_phase_shift9" value="0" />
<parameter name="gui_cascade_counter0" value="false" />
<parameter name="gui_cascade_counter1" value="false" />
<parameter name="gui_cascade_counter10" value="false" />
<parameter name="gui_cascade_counter11" value="false" />
<parameter name="gui_cascade_counter12" value="false" />
<parameter name="gui_cascade_counter13" value="false" />
<parameter name="gui_cascade_counter14" value="false" />
<parameter name="gui_cascade_counter15" value="false" />
<parameter name="gui_cascade_counter16" value="false" />
<parameter name="gui_cascade_counter17" value="false" />
<parameter name="gui_cascade_counter2" value="false" />
<parameter name="gui_cascade_counter3" value="false" />
<parameter name="gui_cascade_counter4" value="false" />
<parameter name="gui_cascade_counter5" value="false" />
<parameter name="gui_cascade_counter6" value="false" />
<parameter name="gui_cascade_counter7" value="false" />
<parameter name="gui_cascade_counter8" value="false" />
<parameter name="gui_cascade_counter9" value="false" />
<parameter name="gui_cascade_outclk_index" value="0" />
<parameter name="gui_channel_spacing" value="0.0" />
<parameter name="gui_clk_bad" value="false" />
<parameter name="gui_device_speed_grade" value="1" />
<parameter name="gui_divide_factor_c0" value="1" />
<parameter name="gui_divide_factor_c1" value="1" />
<parameter name="gui_divide_factor_c10" value="1" />
<parameter name="gui_divide_factor_c11" value="1" />
<parameter name="gui_divide_factor_c12" value="1" />
<parameter name="gui_divide_factor_c13" value="1" />
<parameter name="gui_divide_factor_c14" value="1" />
<parameter name="gui_divide_factor_c15" value="1" />
<parameter name="gui_divide_factor_c16" value="1" />
<parameter name="gui_divide_factor_c17" value="1" />
<parameter name="gui_divide_factor_c2" value="1" />
<parameter name="gui_divide_factor_c3" value="1" />
<parameter name="gui_divide_factor_c4" value="1" />
<parameter name="gui_divide_factor_c5" value="1" />
<parameter name="gui_divide_factor_c6" value="1" />
<parameter name="gui_divide_factor_c7" value="1" />
<parameter name="gui_divide_factor_c8" value="1" />
<parameter name="gui_divide_factor_c9" value="1" />
<parameter name="gui_divide_factor_n" value="1" />
<parameter name="gui_dps_cntr" value="C0" />
<parameter name="gui_dps_dir" value="Positive" />
<parameter name="gui_dps_num" value="1" />
<parameter name="gui_dsm_out_sel" value="1st_order" />
<parameter name="gui_duty_cycle0" value="50" />
<parameter name="gui_duty_cycle1" value="50" />
<parameter name="gui_duty_cycle10" value="50" />
<parameter name="gui_duty_cycle11" value="50" />
<parameter name="gui_duty_cycle12" value="50" />
<parameter name="gui_duty_cycle13" value="50" />
<parameter name="gui_duty_cycle14" value="50" />
<parameter name="gui_duty_cycle15" value="50" />
<parameter name="gui_duty_cycle16" value="50" />
<parameter name="gui_duty_cycle17" value="50" />
<parameter name="gui_duty_cycle2" value="50" />
<parameter name="gui_duty_cycle3" value="50" />
<parameter name="gui_duty_cycle4" value="50" />
<parameter name="gui_duty_cycle5" value="50" />
<parameter name="gui_duty_cycle6" value="50" />
<parameter name="gui_duty_cycle7" value="50" />
<parameter name="gui_duty_cycle8" value="50" />
<parameter name="gui_duty_cycle9" value="50" />
<parameter name="gui_en_adv_params" value="false" />
<parameter name="gui_en_dps_ports" value="false" />
<parameter name="gui_en_phout_ports" value="false" />
<parameter name="gui_en_reconf" value="false" />
<parameter name="gui_enable_cascade_in" value="false" />
<parameter name="gui_enable_cascade_out" value="false" />
<parameter name="gui_enable_mif_dps" value="false" />
<parameter name="gui_feedback_clock" value="Global Clock" />
<parameter name="gui_frac_multiply_factor" value="1" />
<parameter name="gui_fractional_cout" value="32" />
<parameter name="gui_mif_generate" value="false" />
<parameter name="gui_multiply_factor" value="1" />
<parameter name="gui_number_of_clocks" value="12" />
<parameter name="gui_operation_mode" value="direct" />
<parameter name="gui_output_clock_frequency0" value="5.0" />
<parameter name="gui_output_clock_frequency1" value="10.0" />
<parameter name="gui_output_clock_frequency10" value="225.0" />
<parameter name="gui_output_clock_frequency11" value="250.0" />
<parameter name="gui_output_clock_frequency12" value="100.0" />
<parameter name="gui_output_clock_frequency13" value="100.0" />
<parameter name="gui_output_clock_frequency14" value="100.0" />
<parameter name="gui_output_clock_frequency15" value="100.0" />
<parameter name="gui_output_clock_frequency16" value="100.0" />
<parameter name="gui_output_clock_frequency17" value="100.0" />
<parameter name="gui_output_clock_frequency2" value="25.0" />
<parameter name="gui_output_clock_frequency3" value="50.0" />
<parameter name="gui_output_clock_frequency4" value="75.0" />
<parameter name="gui_output_clock_frequency5" value="100.0" />
<parameter name="gui_output_clock_frequency6" value="125.0" />
<parameter name="gui_output_clock_frequency7" value="150.0" />
<parameter name="gui_output_clock_frequency8" value="175.0" />
<parameter name="gui_output_clock_frequency9" value="200.0" />
<parameter name="gui_phase_shift0" value="0" />
<parameter name="gui_phase_shift1" value="0" />
<parameter name="gui_phase_shift10" value="0" />
<parameter name="gui_phase_shift11" value="0" />
<parameter name="gui_phase_shift12" value="0" />
<parameter name="gui_phase_shift13" value="0" />
<parameter name="gui_phase_shift14" value="0" />
<parameter name="gui_phase_shift15" value="0" />
<parameter name="gui_phase_shift16" value="0" />
<parameter name="gui_phase_shift17" value="0" />
<parameter name="gui_phase_shift2" value="0" />
<parameter name="gui_phase_shift3" value="0" />
<parameter name="gui_phase_shift4" value="0" />
<parameter name="gui_phase_shift5" value="0" />
<parameter name="gui_phase_shift6" value="0" />
<parameter name="gui_phase_shift7" value="0" />
<parameter name="gui_phase_shift8" value="0" />
<parameter name="gui_phase_shift9" value="0" />
<parameter name="gui_phase_shift_deg0" value="0.0" />
<parameter name="gui_phase_shift_deg1" value="0.0" />
<parameter name="gui_phase_shift_deg10" value="0.0" />
<parameter name="gui_phase_shift_deg11" value="0.0" />
<parameter name="gui_phase_shift_deg12" value="0.0" />
<parameter name="gui_phase_shift_deg13" value="0.0" />
<parameter name="gui_phase_shift_deg14" value="0.0" />
<parameter name="gui_phase_shift_deg15" value="0.0" />
<parameter name="gui_phase_shift_deg16" value="0.0" />
<parameter name="gui_phase_shift_deg17" value="0.0" />
<parameter name="gui_phase_shift_deg2" value="0.0" />
<parameter name="gui_phase_shift_deg3" value="0.0" />
<parameter name="gui_phase_shift_deg4" value="0.0" />
<parameter name="gui_phase_shift_deg5" value="0.0" />
<parameter name="gui_phase_shift_deg6" value="0.0" />
<parameter name="gui_phase_shift_deg7" value="0.0" />
<parameter name="gui_phase_shift_deg8" value="0.0" />
<parameter name="gui_phase_shift_deg9" value="0.0" />
<parameter name="gui_phout_division" value="1" />
<parameter name="gui_pll_auto_reset" value="Off" />
<parameter name="gui_pll_bandwidth_preset" value="Auto" />
<parameter name="gui_pll_cascading_mode">Create an adjpllin signal to connect with an upstream PLL</parameter>
<parameter name="gui_pll_mode" value="Integer-N PLL" />
<parameter name="gui_ps_units0" value="ps" />
<parameter name="gui_ps_units1" value="ps" />
<parameter name="gui_ps_units10" value="ps" />
<parameter name="gui_ps_units11" value="ps" />
<parameter name="gui_ps_units12" value="ps" />
<parameter name="gui_ps_units13" value="ps" />
<parameter name="gui_ps_units14" value="ps" />
<parameter name="gui_ps_units15" value="ps" />
<parameter name="gui_ps_units16" value="ps" />
<parameter name="gui_ps_units17" value="ps" />
<parameter name="gui_ps_units2" value="ps" />
<parameter name="gui_ps_units3" value="ps" />
<parameter name="gui_ps_units4" value="ps" />
<parameter name="gui_ps_units5" value="ps" />
<parameter name="gui_ps_units6" value="ps" />
<parameter name="gui_ps_units7" value="ps" />
<parameter name="gui_ps_units8" value="ps" />
<parameter name="gui_ps_units9" value="ps" />
<parameter name="gui_refclk1_frequency" value="100.0" />
<parameter name="gui_refclk_switch" value="false" />
<parameter name="gui_reference_clock_frequency" value="50.0" />
<parameter name="gui_switchover_delay" value="0" />
<parameter name="gui_switchover_mode">Automatic Switchover</parameter>
<parameter name="gui_use_locked" value="false" />
</module>
<connection
kind="avalon"
version="16.0"
start="XCVRDrvGen1x8.reconfig_mgmt"
end="XCVRCtrlGen1x8.reconfig_mgmt">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection kind="clock" version="16.0" start="clk_0.clk" end="pll_0.refclk" />
<connection
kind="conduit"
version="16.0"
start="XCVRDrvGen1x8.hip_currentspeed"
end="PCIeGen1x8If64.hip_currentspeed">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRDrvGen1x8.reconfig_busy"
end="XCVRCtrlGen1x8.reconfig_busy">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRCtrlGen1x8.reconfig_from_xcvr"
end="PCIeGen1x8If64.reconfig_from_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRCtrlGen1x8.reconfig_to_xcvr"
end="PCIeGen1x8If64.reconfig_to_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection kind="reset" version="16.0" start="clk_0.clk_reset" end="pll_0.reset" />
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Full Version
# Date created = 16:27:01 June 09, 2014
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "13.1"
DATE = "16:27:01 June 09, 2014"
# Revisions
PROJECT_REVISION = "DE5QGen1x8If64"

469
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Full Version
# Date created = 11:03:06 March 21, 2014
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# DE5QGen1x8If64_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Stratix V"
set_global_assignment -name DEVICE 5SGXEA7N2F45C2
set_global_assignment -name TOP_LEVEL_ENTITY DE5QGen1x8If64
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:03:06 MARCH 21, 2014"
set_global_assignment -name LAST_QUARTUS_VERSION 16.0.0
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ../bit/
################################################################################
# Timing SDC Files
################################################################################
################################################################################
# PCIE Connections
################################################################################
# PCIe clk (100 MHz)
set_location_assignment PIN_AK38 -to PCIE_REFCLK
set_instance_assignment -name IO_STANDARD HCSL -to PCIE_REFCLK
set_location_assignment PIN_AK39 -to "PCIE_REFCLK(n)"
set_instance_assignment -name IO_STANDARD HCSL -to "PCIE_REFCLK(n)"
set_location_assignment PIN_AU33 -to PCIE_RESET_N
set_instance_assignment -name IO_STANDARD "2.5 V" -to PCIE_RESET_N
################################################################################
#PCIE Pins
################################################################################
# Settings from SV PCIE User Guide (AV-ST)
# 100 Ohm Termination
# 1.5V PCML
# XCVR_VCCR_VCCT_VOLTAGE 0_9V (GEN 1/2 CMU)
# XCVR_VCCA_VOLTAGE 2_5V (GEN 1/2 CMU)
# We use CMU PLL's (http://www.altera.com/literature/hb/stratix-v/stx5_52003.pdf)
################################################################################
#PCIE RX_IN 0
################################################################################
set_location_assignment PIN_BB43 -to PCIE_RX_IN[0]
set_location_assignment PIN_BB44 -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[0]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[0](n)"
################################################################################
#PCIE RX_IN 1
################################################################################
set_location_assignment PIN_BA41 -to PCIE_RX_IN[1]
set_location_assignment PIN_BA42 -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[1]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[1](n)"
################################################################################
#PCIE RX_IN 2
################################################################################
set_location_assignment PIN_AW41 -to PCIE_RX_IN[2]
set_location_assignment PIN_AW42 -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[2]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[2](n)"
################################################################################
#PCIE RX_IN 3
################################################################################
set_location_assignment PIN_AY43 -to PCIE_RX_IN[3]
set_location_assignment PIN_AY44 -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[3]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[3](n)"
################################################################################
#PCIE RX_IN 4
################################################################################
set_location_assignment PIN_AT43 -to PCIE_RX_IN[4]
set_location_assignment PIN_AT44 -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[4]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[4](n)"
################################################################################
#PCIE RX_IN 5
################################################################################
set_location_assignment PIN_AP43 -to PCIE_RX_IN[5]
set_location_assignment PIN_AP44 -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[5]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[5](n)"
################################################################################
#PCIE RX_IN 6
################################################################################
set_location_assignment PIN_AM43 -to PCIE_RX_IN[6]
set_location_assignment PIN_AM44 -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[6]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[6](n)"
################################################################################
#PCIE RX_IN 7
################################################################################
set_location_assignment PIN_AK43 -to PCIE_RX_IN[7]
set_location_assignment PIN_AK44 -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_RX_IN[7]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_RX_IN[7](n)"
################################################################################
#PCIE TX_OUT 0
################################################################################
set_location_assignment PIN_AY39 -to PCIE_TX_OUT[0]
set_location_assignment PIN_AY40 -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[0]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[0](n)"
################################################################################
#PCIE TX_OUT 1
################################################################################
set_location_assignment PIN_AV39 -to PCIE_TX_OUT[1]
set_location_assignment PIN_AV40 -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[1]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[1](n)"
################################################################################
#PCIE TX_OUT 2
################################################################################
set_location_assignment PIN_AT39 -to PCIE_TX_OUT[2]
set_location_assignment PIN_AT40 -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[2]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[2](n)"
################################################################################
#PCIE TX_OUT 3
################################################################################
set_location_assignment PIN_AU41 -to PCIE_TX_OUT[3]
set_location_assignment PIN_AU42 -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[3]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[3](n)"
################################################################################
#PCIE TX_OUT 4
################################################################################
set_location_assignment PIN_AN41 -to PCIE_TX_OUT[4]
set_location_assignment PIN_AN42 -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[4]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[4](n)"
################################################################################
#PCIE TX_OUT 5
################################################################################
set_location_assignment PIN_AL41 -to PCIE_TX_OUT[5]
set_location_assignment PIN_AL42 -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[5]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[5](n)"
################################################################################
#PCIE TX_OUT 6
################################################################################
set_location_assignment PIN_AJ41 -to PCIE_TX_OUT[6]
set_location_assignment PIN_AJ42 -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[6]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[6](n)"
################################################################################
#PCIE TX_OUT 7
################################################################################
set_location_assignment PIN_AG41 -to PCIE_TX_OUT[7]
set_location_assignment PIN_AG42 -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to PCIE_TX_OUT[7]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN1 -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 0_9V -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 2_5V -to "PCIE_TX_OUT[7](n)"
################################################################################
# LED's
################################################################################
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[0]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[1]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[2]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[4]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[5]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[6]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[7]
set_location_assignment PIN_AW37 -to LED[0]
set_location_assignment PIN_AV37 -to LED[1]
set_location_assignment PIN_BB36 -to LED[2]
set_location_assignment PIN_BB39 -to LED[3]
set_location_assignment PIN_AH15 -to LED[4]
set_location_assignment PIN_AH13 -to LED[5]
set_location_assignment PIN_AJ13 -to LED[6]
set_location_assignment PIN_AJ14 -to LED[7]
################################################################################
# OSCILLATORS
################################################################################
set_location_assignment PIN_BC28 -to OSC_BANK3D_50MHZ
set_instance_assignment -name IO_STANDARD "1.8 V" -to OSC_BANK3D_50MHZ
################################################################################
# End Custom Instantiations
################################################################################
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name SEARCH_PATH ../../../../riffa_hdl
set_global_assignment -name SDC_FILE ../constr/DE5QGen1x8If64.sdc
set_global_assignment -name QSYS_FILE ../ip/QSysDE5QGen1x8If64.qsys
set_global_assignment -name VERILOG_FILE ../hdl/DE5QGen1x8If64.v
set_global_assignment -name VERILOG_FILE ../../riffa_wrapper_de5.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_extender.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_controller.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/txr_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/txc_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_writer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_hdr_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine_selector.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_shift.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_alignment_pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/translation_altera.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/syncff.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sync_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/shiftreg.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_requester.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/scsdpram.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rxr_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rxc_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_requester_mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_reader.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_channel_gate.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rotate.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/riffa.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue_output.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue_input.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/registers.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/register.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/recv_credit_flow_ctrl.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ram_2clk_1w_1r.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ram_1clk_1w_1r.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/one_hot_mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ohtb.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/offset_to_mask.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/offset_flag_to_one_hot.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/interrupt_controller.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/interrupt.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ff.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/engine_layer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/demux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/cross_domain_signal.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/counter.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/chnl_tester.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/async_fifo_fwft.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/async_fifo.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

63
fpga/altera/de5/DE5QGen2x8If128_CLK/Makefile Normal file
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@ -0,0 +1,63 @@
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#-----------------------------------------------------------------------
# Filename: Makefile
# Version: 1.0
# Description: Project-level makefile for building an example project
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------
# This make file expects the following variables to be set:
# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory.
# BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to
# BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory
WIDTH=128
TYPE=classic
CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
PROJECT=$(shell basename $(CURRENT_PATH))
ifndef RIFFA_HDL_PATH
RIFFA_HDL_PATH:=../../../riffa_hdl
endif
ifndef BOARD_PATH
BOARD_PATH:=..
endif
ifndef JOBS
JOBS=1
endif
include $(RIFFA_HDL_PATH)/riffa.mk
include $(BOARD_PATH)/board.mk
PROJECT_IP+=ip/QSysDE5QGen2x8If128.qsys
RELEASE_IP+=ip/QSysDE5QGen2x8If128.qsys

BIN
fpga/altera/de5/DE5QGen2x8If128_CLK/bit/DE5QGen2x8If128.sof Normal file
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110
fpga/altera/de5/DE5QGen2x8If128_CLK/constr/DE5QGen2x8If128.sdc Normal file
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@ -0,0 +1,110 @@
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#----------------------------------------------------------------------------
# Filename: DE5QGen2x8If128.sdc (Qsys)
# Version: 1.00.a
# Verilog Standard: Verilog-2001
# Description: Synopsys Design Constraints for the DE5 board.
# These design constrains constrain the PCIE_REFCLK, and 50 MHz Clock Input
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------------
create_clock -name PCIE_REFCLK -period 10.000 [get_ports {PCIE_REFCLK}]
create_clock -name osc_50MHz -period 20.000 [get_ports {OSC_BANK3D_50MHZ}]
create_clock -name riffa_5_clk -period 200 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_10_clk -period 100 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_25_clk -period 40 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_50_clk -period 20 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[3].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_75_clk -period 13.3 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[4].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_100_clk -period 10 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[5].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_125_clk -period 8 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[6].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_150_clk -period 6.66 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[7].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_175_clk -period 6 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[8].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_200_clk -period 5.33 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[9].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_225_clk -period 4.66 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[10].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name riffa_250_clk -period 4 [get_pins {pcie_system_inst|pll_0|altera_pll_i|general[11].gpll~PLL_OUTPUT_COUNTER|divclk}]
create_clock -name user_clk -period 4 [get_pins {pcie_system_inst|pciegen2x8if128|altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip|coreclkout}]
set_clock_groups -asynchronous -group {user_clk} -group {riffa_5_clk} -group {riffa_10_clk} -group {riffa_25_clk} -group {riffa_50_clk} -group {riffa_75_clk} -group {riffa_100_clk} -group {riffa_125_clk} -group {riffa_150_clk} -group {riffa_175_clk} -group {riffa_200_clk} -group {riffa_225_clk} -group {riffa_250_clk}
################################################################################
# 13.1 Workround for http://www.altera.com/support/kdb/solutions/rd12162013_581.html?GSA_pos=1&WT.oss_r=1&WT.oss=adce_off_r
################################################################################
set_false_path -to [get_registers *|*.adce_off_r[0]]
set_false_path -to [get_registers *|*.adce_on_rr[0]]
set_false_path -to [get_registers *|reset_sync_pldclk_r[*]]
################################################################################
# End Workround
################################################################################
derive_pll_clocks -create_base_clocks
derive_clock_uncertainty
################################################################################
# Imports from Example Design (altera/13.1/ip/altera/altera_pcie/altera_pcie_hip_ast_ed/)
################################################################################
######################################################################
# HIP Soft reset controller SDC constraints
set_false_path -to [get_registers *altpcie_rs_serdes|fifo_err_sync_r[0]]
set_false_path -from [get_registers *sv_xcvr_pipe_native*] -to [get_registers *altpcie_rs_serdes|*]
# HIP testin pins SDC constraints
set_false_path -from [get_pins -compatibility_mode *hip_ctrl*]
######################################################################
# Constraints for CV SIG asynchonous logic
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_in_d0[*]}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_wr_clk}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_req_rd_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_rd_clk_d0}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_ack_wr_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_wr_clk}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_req_rd_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_in_d0[*]}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_tls|altpcie_hip_vecsync:altpcie_hip_vecsync2|data_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|req_rd_clk_d0}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hip_eq_dprio:sigtesten.hip_eq_dprio_inst|altpcie_hip_vecsync2:vecsync_ltssm|altpcie_hip_vecsync:altpcie_hip_vecsync2|altpcie_hip_bitsync:u_ack_wr_clk|sync_regs[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|test_out[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_eqout[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_eqber[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_farend_lf[*]}]
set_false_path -from [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip~SYNC_DATA_REG122}] -to [get_keepers {*|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|hd_altpe3_hip_eq_bypass_ph3:sigtesten.ep_eq_bypass_ph3_inst|test_dbg_farend_fs[*]}]

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fpga/altera/de5/DE5QGen2x8If128_CLK/hdl/DE5QGen2x8If128.v Normal file
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// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following
// disclaimer in the documentation and/or other materials provided
// with the distribution.
//
// * Neither the name of The Regents of the University of California
// nor the names of its contributors may be used to endorse or
// promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
// UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
// ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
// TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
// USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
// DAMAGE.
// ----------------------------------------------------------------------
//----------------------------------------------------------------------------
// Filename: DE5QGen2x8If128.v
// Version:
// Verilog Standard: Verilog-2001
// Description: Top level module for RIFFA 2.2 reference design for the
// the Altera Stratix V Avalong Streaming Interface to PCI
// Express module and the Terasic DE5 Development Board.
// Author: Dustin Richmond (@darichmond)
//-----------------------------------------------------------------------------
`include "functions.vh"
`include "riffa.vh"
`include "altera.vh"
`timescale 1ps / 1ps
module DE5QGen2x8If128
#(// Number of RIFFA Channels
parameter C_NUM_CHNL = 12,
// Number of PCIe Lanes
parameter C_NUM_LANES = 8,
// Settings from Quartus IP Library
parameter C_PCI_DATA_WIDTH = 128,
parameter C_MAX_PAYLOAD_BYTES = 256,
parameter C_LOG_NUM_TAGS = 5
)
(
// ----------LEDs----------
output [7:0] LED,
// ----------PCIE----------
input PCIE_RESET_N,
input PCIE_REFCLK,
// ----------PCIE Serial RX----------
input [C_NUM_LANES-1:0] PCIE_RX_IN,
// ----------PCIE Serial TX----------
output [C_NUM_LANES-1:0] PCIE_TX_OUT,
// ----------Oscillators----------
input OSC_BANK3D_50MHZ
);
wire npor;
wire pin_perst;
// ----------TL Config interface----------
wire [3:0] tl_cfg_add;
wire [31:0] tl_cfg_ctl;
wire [52:0] tl_cfg_sts;
// ----------Rx/TX Interfaces----------
wire [0:0] rx_st_sop;
wire [0:0] rx_st_eop;
wire [0:0] rx_st_err;
wire [0:0] rx_st_valid;
wire [0:0] rx_st_empty;
wire rx_st_ready;
wire [C_PCI_DATA_WIDTH-1:0] rx_st_data;
wire [0:0] tx_st_sop;
wire [0:0] tx_st_eop;
wire [0:0] tx_st_err;
wire [0:0] tx_st_valid;
wire tx_st_ready;
wire [C_PCI_DATA_WIDTH-1:0] tx_st_data;
wire [0:0] tx_st_empty;
// ----------Clocks & Locks----------
wire pld_clk;
wire coreclkout_hip;
wire refclk;
wire pld_core_ready;
wire reset_status;
wire serdes_pll_locked;
wire riffa_5_clk;
wire riffa_10_clk;
wire riffa_25_clk;
wire riffa_50_clk;
wire riffa_75_clk;
wire riffa_100_clk;
wire riffa_125_clk;
wire riffa_150_clk;
wire riffa_175_clk;
wire riffa_200_clk;
wire riffa_225_clk;
wire riffa_250_clk;
// ----------Interrupt Interfaces----------
wire app_msi_req;
wire app_msi_ack;
// ----------Reconfiguration Controller signals----------
wire mgmt_clk_clk;
wire mgmt_rst_reset;
// ----------Reconfiguration Driver Signals----------
wire reconfig_xcvr_clk;
wire reconfig_xcvr_rst;
wire [7:0] rx_in;
wire [7:0] tx_out;
// ------------Status Interface------------
wire derr_cor_ext_rcv;
wire derr_cor_ext_rpl;
wire derr_rpl;
wire dlup;
wire dlup_exit;
wire ev128ns;
wire ev1us;
wire hotrst_exit;
wire [3:0] int_status;
wire l2_exit;
wire [3:0] lane_act;
wire [4:0] ltssmstate;
wire rx_par_err;
wire [1:0] tx_par_err;
wire cfg_par_err;
wire [7:0] ko_cpl_spc_header;
wire [11:0] ko_cpl_spc_data;
// ----------Clocks----------
assign pld_clk = coreclkout_hip;
assign mgmt_clk_clk = PCIE_REFCLK;
assign reconfig_xcvr_clk = PCIE_REFCLK;
assign refclk = PCIE_REFCLK;
assign pld_core_ready = serdes_pll_locked;
// ----------Resets----------
assign reconfig_xcvr_rst = 1'b0;
assign mgmt_rst_reset = 1'b0;
assign pin_perst = PCIE_RESET_N;
assign npor = PCIE_RESET_N;
// ----------LED's----------
assign LED[7:0] = 8'hff;
// -------------------- BEGIN ALTERA IP INSTANTIATION --------------------//
QSysDE5QGen2x8If128
pcie_system_inst
(
// Outputs
.rx_st_startofpacket (rx_st_sop[0:0]),
.rx_st_endofpacket (rx_st_eop[0:0]),
.rx_st_valid (rx_st_valid[0:0]),
.rx_st_empty (rx_st_empty[0:0]),
.rx_st_data (rx_st_data[127:0]),
.tx_st_ready (tx_st_ready),
.pciehip_reset_status (reset_status),
.pciehip_serdes_pll_locked (serdes_pll_locked),
.pciecfg_tl_cfg_add (tl_cfg_add[3:0]),
.pciecfg_tl_cfg_ctl (tl_cfg_ctl[31:0]),
.pciecfg_tl_cfg_sts (tl_cfg_sts[52:0]),
.pciecoreclk_clk (coreclkout_hip),
.pcieserial_tx_out0 (PCIE_TX_OUT[0]),
.pcieserial_tx_out1 (PCIE_TX_OUT[1]),
.pcieserial_tx_out2 (PCIE_TX_OUT[2]),
.pcieserial_tx_out3 (PCIE_TX_OUT[3]),
.pcieserial_tx_out4 (PCIE_TX_OUT[4]),
.pcieserial_tx_out5 (PCIE_TX_OUT[5]),
.pcieserial_tx_out6 (PCIE_TX_OUT[6]),
.pcieserial_tx_out7 (PCIE_TX_OUT[7]),
.pciemsi_app_msi_ack (app_msi_ack),
.pciestat_derr_cor_ext_rcv (derr_cor_ext_rcv),
.pciestat_derr_cor_ext_rpl (derr_cor_ext_rpl),
.pciestat_derr_rpl (derr_rpl),
.pciestat_dlup (dlup),
.pciestat_dlup_exit (dlup_exit),
.pciestat_ev128ns (ev128ns),
.pciestat_ev1us (ev1us),
.pciestat_hotrst_exit (hotrst_exit),
.pciestat_int_status (int_status),
.pciestat_l2_exit (l2_exit),
.pciestat_lane_act (lane_act),
.pciestat_ltssmstate (ltssmstate),
.pciestat_rx_par_err (rx_par_err),
.pciestat_tx_par_err (tx_par_err),
.pciestat_cfg_par_err (cfg_par_err),
.pciestat_ko_cpl_spc_header (ko_cpl_spc_header),
.pciestat_ko_cpl_spc_data (ko_cpl_spc_data),
.riffa_5_clk (riffa_5_clk),
.riffa_10_clk (riffa_10_clk),
.riffa_25_clk (riffa_25_clk),
.riffa_50_clk (riffa_50_clk),
.riffa_75_clk (riffa_75_clk),
.riffa_100_clk (riffa_100_clk),
.riffa_125_clk (riffa_125_clk),
.riffa_150_clk (riffa_150_clk),
.riffa_175_clk (riffa_175_clk),
.riffa_200_clk (riffa_200_clk),
.riffa_225_clk (riffa_225_clk),
.riffa_250_clk (riffa_250_clk),
// Inputs
.rx_st_ready (rx_st_ready),
.tx_st_startofpacket (tx_st_sop[0:0]),
.tx_st_endofpacket (tx_st_eop[0:0]),
.tx_st_valid (tx_st_valid[0:0]),
.tx_st_empty (tx_st_empty[0:0]),
.tx_st_data (tx_st_data[127:0]),
.pciehip_pld_core_ready (pld_core_ready),
.pcienpor_npor (npor),
.pcienpor_pin_perst (pin_perst),
.pcierefclk_clk (refclk),
.reconfigrefclk_clk (reconfig_xcvr_clk),
.pciepld_clk (pld_clk),
.reconfigrst_reset (reconfig_xcvr_rst),
.mgmtrst_reset (mgmt_rst_reset),
.mgmtclk_clk (mgmt_clk_clk),
.reconfigpldclk_clk (pld_clk),
.pcieserial_rx_in0 (PCIE_RX_IN[0]),
.pcieserial_rx_in1 (PCIE_RX_IN[1]),
.pcieserial_rx_in2 (PCIE_RX_IN[2]),
.pcieserial_rx_in3 (PCIE_RX_IN[3]),
.pcieserial_rx_in4 (PCIE_RX_IN[4]),
.pcieserial_rx_in5 (PCIE_RX_IN[5]),
.pcieserial_rx_in6 (PCIE_RX_IN[6]),
.pcieserial_rx_in7 (PCIE_RX_IN[7]),
.pciemsi_app_msi_req (app_msi_req),
.drvstat_derr_cor_ext_rcv (derr_cor_ext_rcv),
.drvstat_derr_cor_ext_rpl (derr_cor_ext_rpl),
.drvstat_derr_rpl (derr_rpl),
.drvstat_dlup (dlup),
.drvstat_dlup_exit (dlup_exit),
.drvstat_ev128ns (ev128ns),
.drvstat_ev1us (ev1us),
.drvstat_hotrst_exit (hotrst_exit),
.drvstat_int_status (int_status),
.drvstat_l2_exit (l2_exit),
.drvstat_lane_act (lane_act),
.drvstat_ltssmstate (ltssmstate),
.drvstat_rx_par_err (rx_par_err),
.drvstat_tx_par_err (tx_par_err),
.drvstat_cfg_par_err (cfg_par_err),
.drvstat_ko_cpl_spc_header (ko_cpl_spc_header),
.drvstat_ko_cpl_spc_data (ko_cpl_spc_data),
.pllrefclk_clk (OSC_BANK3D_50MHZ),
.pllrst_reset_n (1'b1));
// -------------------- END ALTERA IP INSTANTIATION --------------------
// -------------------- BEGIN RIFFA INSTANTAION --------------------
// RIFFA channel interface
wire rst_out;
wire [C_NUM_CHNL-1:0] chnl_rx_clk;
wire [C_NUM_CHNL-1:0] chnl_rx;
wire [C_NUM_CHNL-1:0] chnl_rx_ack;
wire [C_NUM_CHNL-1:0] chnl_rx_last;
wire [(C_NUM_CHNL*32)-1:0] chnl_rx_len;
wire [(C_NUM_CHNL*31)-1:0] chnl_rx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_rx_data;
wire [C_NUM_CHNL-1:0] chnl_rx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_rx_data_ren;
wire [C_NUM_CHNL-1:0] chnl_tx_clk;
wire [C_NUM_CHNL-1:0] chnl_tx;
wire [C_NUM_CHNL-1:0] chnl_tx_ack;
wire [C_NUM_CHNL-1:0] chnl_tx_last;
wire [(C_NUM_CHNL*32)-1:0] chnl_tx_len;
wire [(C_NUM_CHNL*31)-1:0] chnl_tx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_tx_data;
wire [C_NUM_CHNL-1:0] chnl_tx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_tx_data_ren;
wire chnl_reset;
wire chnl_clk;
assign chnl_clk = pld_clk;
assign chnl_reset = rst_out;
riffa_wrapper_de5
#(/*AUTOINSTPARAM*/
// Parameters
.C_LOG_NUM_TAGS (C_LOG_NUM_TAGS),
.C_NUM_CHNL (C_NUM_CHNL),
.C_PCI_DATA_WIDTH (C_PCI_DATA_WIDTH),
.C_MAX_PAYLOAD_BYTES (C_MAX_PAYLOAD_BYTES))
riffa
(// Outputs
.RX_ST_READY (rx_st_ready),
.TX_ST_DATA (tx_st_data[C_PCI_DATA_WIDTH-1:0]),
.TX_ST_VALID (tx_st_valid[0:0]),
.TX_ST_EOP (tx_st_eop[0:0]),
.TX_ST_SOP (tx_st_sop[0:0]),
.TX_ST_EMPTY (tx_st_empty[0:0]),
.APP_MSI_REQ (app_msi_req),
.RST_OUT (rst_out),
.CHNL_RX (chnl_rx[C_NUM_CHNL-1:0]),
.CHNL_RX_LAST (chnl_rx_last[C_NUM_CHNL-1:0]),
.CHNL_RX_LEN (chnl_rx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_RX_OFF (chnl_rx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_RX_DATA (chnl_rx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_RX_DATA_VALID (chnl_rx_data_valid[C_NUM_CHNL-1:0]),
.CHNL_TX_ACK (chnl_tx_ack[C_NUM_CHNL-1:0]),
.CHNL_TX_DATA_REN (chnl_tx_data_ren[C_NUM_CHNL-1:0]),
// Inputs
.RX_ST_DATA (rx_st_data[C_PCI_DATA_WIDTH-1:0]),
.RX_ST_EOP (rx_st_eop[0:0]),
.RX_ST_SOP (rx_st_sop[0:0]),
.RX_ST_VALID (rx_st_valid[0:0]),
.RX_ST_EMPTY (rx_st_empty[0:0]),
.TX_ST_READY (tx_st_ready),
.TL_CFG_CTL (tl_cfg_ctl[`SIG_CFG_CTL_W-1:0]),
.TL_CFG_ADD (tl_cfg_add[`SIG_CFG_ADD_W-1:0]),
.TL_CFG_STS (tl_cfg_sts[`SIG_CFG_STS_W-1:0]),
.KO_CPL_SPC_HEADER (ko_cpl_spc_header[`SIG_KO_CPLH_W-1:0]),
.KO_CPL_SPC_DATA (ko_cpl_spc_data[`SIG_KO_CPLD_W-1:0]),
.APP_MSI_ACK (app_msi_ack),
.PLD_CLK (pld_clk),
.RESET_STATUS (reset_status),
.CHNL_RX_CLK (chnl_rx_clk[C_NUM_CHNL-1:0]),
.CHNL_RX_ACK (chnl_rx_ack[C_NUM_CHNL-1:0]),
.CHNL_RX_DATA_REN (chnl_rx_data_ren[C_NUM_CHNL-1:0]),
.CHNL_TX_CLK (chnl_tx_clk[C_NUM_CHNL-1:0]),
.CHNL_TX (chnl_tx[C_NUM_CHNL-1:0]),
.CHNL_TX_LAST (chnl_tx_last[C_NUM_CHNL-1:0]),
.CHNL_TX_LEN (chnl_tx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_TX_OFF (chnl_tx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_TX_DATA (chnl_tx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_TX_DATA_VALID (chnl_tx_data_valid[C_NUM_CHNL-1:0]));
// -------------------- END RIFFA INSTANTAION --------------------
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_5mhz
(.CLK(riffa_5_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[0]),
.CHNL_RX(chnl_rx[0]),
.CHNL_RX_ACK(chnl_rx_ack[0]),
.CHNL_RX_LAST(chnl_rx_last[0]),
.CHNL_RX_LEN(chnl_rx_len[32*0 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*0 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[0]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[0]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[0]),
.CHNL_TX(chnl_tx[0]),
.CHNL_TX_ACK(chnl_tx_ack[0]),
.CHNL_TX_LAST(chnl_tx_last[0]),
.CHNL_TX_LEN(chnl_tx_len[32*0 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*0 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[0]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[0]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_10mhz
(.CLK(riffa_10_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[1]),
.CHNL_RX(chnl_rx[1]),
.CHNL_RX_ACK(chnl_rx_ack[1]),
.CHNL_RX_LAST(chnl_rx_last[1]),
.CHNL_RX_LEN(chnl_rx_len[32*1 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*1 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[1]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[1]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[1]),
.CHNL_TX(chnl_tx[1]),
.CHNL_TX_ACK(chnl_tx_ack[1]),
.CHNL_TX_LAST(chnl_tx_last[1]),
.CHNL_TX_LEN(chnl_tx_len[32*1 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*1 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[1]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[1]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_25mhz
(.CLK(riffa_25_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[2]),
.CHNL_RX(chnl_rx[2]),
.CHNL_RX_ACK(chnl_rx_ack[2]),
.CHNL_RX_LAST(chnl_rx_last[2]),
.CHNL_RX_LEN(chnl_rx_len[32*2 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*2 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[2]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[2]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[2]),
.CHNL_TX(chnl_tx[2]),
.CHNL_TX_ACK(chnl_tx_ack[2]),
.CHNL_TX_LAST(chnl_tx_last[2]),
.CHNL_TX_LEN(chnl_tx_len[32*2 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*2 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[2]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[2]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_50mhz
(.CLK(riffa_50_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[3]),
.CHNL_RX(chnl_rx[3]),
.CHNL_RX_ACK(chnl_rx_ack[3]),
.CHNL_RX_LAST(chnl_rx_last[3]),
.CHNL_RX_LEN(chnl_rx_len[32*3 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*3 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[3]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[3]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[3]),
.CHNL_TX(chnl_tx[3]),
.CHNL_TX_ACK(chnl_tx_ack[3]),
.CHNL_TX_LAST(chnl_tx_last[3]),
.CHNL_TX_LEN(chnl_tx_len[32*3 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*3 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[3]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[3]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_75mhz
(.CLK(riffa_75_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[4]),
.CHNL_RX(chnl_rx[4]),
.CHNL_RX_ACK(chnl_rx_ack[4]),
.CHNL_RX_LAST(chnl_rx_last[4]),
.CHNL_RX_LEN(chnl_rx_len[32*4 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*4 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[4]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[4]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[4]),
.CHNL_TX(chnl_tx[4]),
.CHNL_TX_ACK(chnl_tx_ack[4]),
.CHNL_TX_LAST(chnl_tx_last[4]),
.CHNL_TX_LEN(chnl_tx_len[32*4 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*4 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[4]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[4]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_100mhz
(.CLK(riffa_100_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[5]),
.CHNL_RX(chnl_rx[5]),
.CHNL_RX_ACK(chnl_rx_ack[5]),
.CHNL_RX_LAST(chnl_rx_last[5]),
.CHNL_RX_LEN(chnl_rx_len[32*5 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*5 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[5]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[5]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[5]),
.CHNL_TX(chnl_tx[5]),
.CHNL_TX_ACK(chnl_tx_ack[5]),
.CHNL_TX_LAST(chnl_tx_last[5]),
.CHNL_TX_LEN(chnl_tx_len[32*5 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*5 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[5]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[5]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_125mhz
(.CLK(riffa_125_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[6]),
.CHNL_RX(chnl_rx[6]),
.CHNL_RX_ACK(chnl_rx_ack[6]),
.CHNL_RX_LAST(chnl_rx_last[6]),
.CHNL_RX_LEN(chnl_rx_len[32*6 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*6 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[6]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[6]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[6]),
.CHNL_TX(chnl_tx[6]),
.CHNL_TX_ACK(chnl_tx_ack[6]),
.CHNL_TX_LAST(chnl_tx_last[6]),
.CHNL_TX_LEN(chnl_tx_len[32*6 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*6 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[6]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[6]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_150mhz
(.CLK(riffa_150_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[7]),
.CHNL_RX(chnl_rx[7]),
.CHNL_RX_ACK(chnl_rx_ack[7]),
.CHNL_RX_LAST(chnl_rx_last[7]),
.CHNL_RX_LEN(chnl_rx_len[32*7 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*7 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[7]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[7]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[7]),
.CHNL_TX(chnl_tx[7]),
.CHNL_TX_ACK(chnl_tx_ack[7]),
.CHNL_TX_LAST(chnl_tx_last[7]),
.CHNL_TX_LEN(chnl_tx_len[32*7 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*7 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[7]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[7]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_175mhz
(.CLK(riffa_175_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[8]),
.CHNL_RX(chnl_rx[8]),
.CHNL_RX_ACK(chnl_rx_ack[8]),
.CHNL_RX_LAST(chnl_rx_last[8]),
.CHNL_RX_LEN(chnl_rx_len[32*8 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*8 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[8]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[8]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[8]),
.CHNL_TX(chnl_tx[8]),
.CHNL_TX_ACK(chnl_tx_ack[8]),
.CHNL_TX_LAST(chnl_tx_last[8]),
.CHNL_TX_LEN(chnl_tx_len[32*8 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*8 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[8]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[8]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_200mhz
(.CLK(riffa_200_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[9]),
.CHNL_RX(chnl_rx[9]),
.CHNL_RX_ACK(chnl_rx_ack[9]),
.CHNL_RX_LAST(chnl_rx_last[9]),
.CHNL_RX_LEN(chnl_rx_len[32*9 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*9 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[9]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[9]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[9]),
.CHNL_TX(chnl_tx[9]),
.CHNL_TX_ACK(chnl_tx_ack[9]),
.CHNL_TX_LAST(chnl_tx_last[9]),
.CHNL_TX_LEN(chnl_tx_len[32*9 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*9 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[9]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[9]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_225mhz
(.CLK(riffa_225_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[10]),
.CHNL_RX(chnl_rx[10]),
.CHNL_RX_ACK(chnl_rx_ack[10]),
.CHNL_RX_LAST(chnl_rx_last[10]),
.CHNL_RX_LEN(chnl_rx_len[32*10 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*10 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[10]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[10]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[10]),
.CHNL_TX(chnl_tx[10]),
.CHNL_TX_ACK(chnl_tx_ack[10]),
.CHNL_TX_LAST(chnl_tx_last[10]),
.CHNL_TX_LEN(chnl_tx_len[32*10 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*10 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[10]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[10]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_250mhz
(.CLK(riffa_250_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[11]),
.CHNL_RX(chnl_rx[11]),
.CHNL_RX_ACK(chnl_rx_ack[11]),
.CHNL_RX_LAST(chnl_rx_last[11]),
.CHNL_RX_LEN(chnl_rx_len[32*11 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*11 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[11]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[11]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[11]),
.CHNL_TX(chnl_tx[11]),
.CHNL_TX_ACK(chnl_tx_ack[11]),
.CHNL_TX_LAST(chnl_tx_last[11]),
.CHNL_TX_LEN(chnl_tx_len[32*11 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*11 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[11]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[11]));
endmodule

883
fpga/altera/de5/DE5QGen2x8If128_CLK/ip/QSysDE5QGen2x8If128.qsys Normal file
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@ -0,0 +1,883 @@
<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element PCIeGen2x8If128
{
datum _sortIndex
{
value = "1";
type = "int";
}
}
element XCVRCtrlGen2x8
{
datum _sortIndex
{
value = "2";
type = "int";
}
}
element XCVRDrvGen2x8
{
datum _sortIndex
{
value = "3";
type = "int";
}
}
element clk_0
{
datum _sortIndex
{
value = "0";
type = "int";
}
}
element pll_0
{
datum _sortIndex
{
value = "4";
type = "int";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="5SGXEA7N2F45C2" />
<parameter name="deviceFamily" value="Stratix V" />
<parameter name="deviceSpeedGrade" value="2_H2" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName" value="" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="" />
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface
name="drvstat"
internal="XCVRDrvGen2x8.hip_status_drv"
type="conduit"
dir="end" />
<interface
name="mgmtclk"
internal="XCVRCtrlGen2x8.mgmt_clk_clk"
type="clock"
dir="end" />
<interface
name="mgmtrst"
internal="XCVRCtrlGen2x8.mgmt_rst_reset"
type="reset"
dir="end" />
<interface
name="pciecfg"
internal="PCIeGen2x8If128.config_tl"
type="conduit"
dir="end" />
<interface
name="pciecoreclk"
internal="PCIeGen2x8If128.coreclkout_hip"
type="clock"
dir="start" />
<interface
name="pciehip"
internal="PCIeGen2x8If128.hip_rst"
type="conduit"
dir="end" />
<interface
name="pciemsi"
internal="PCIeGen2x8If128.int_msi"
type="conduit"
dir="end" />
<interface
name="pcienpor"
internal="PCIeGen2x8If128.npor"
type="conduit"
dir="end" />
<interface
name="pciepld"
internal="PCIeGen2x8If128.pld_clk"
type="clock"
dir="end" />
<interface
name="pcierefclk"
internal="PCIeGen2x8If128.refclk"
type="clock"
dir="end" />
<interface
name="pcieserial"
internal="PCIeGen2x8If128.hip_serial"
type="conduit"
dir="end" />
<interface
name="pciestat"
internal="PCIeGen2x8If128.hip_status"
type="conduit"
dir="end" />
<interface name="pllrefclk" internal="clk_0.clk_in" type="clock" dir="end" />
<interface name="pllrst" internal="clk_0.clk_in_reset" type="reset" dir="end" />
<interface
name="reconfigpldclk"
internal="XCVRDrvGen2x8.pld_clk"
type="clock"
dir="end" />
<interface
name="reconfigrefclk"
internal="XCVRDrvGen2x8.reconfig_xcvr_clk"
type="clock"
dir="end" />
<interface
name="reconfigrst"
internal="XCVRDrvGen2x8.reconfig_xcvr_rst"
type="reset"
dir="end" />
<interface name="riffa_10" internal="pll_0.outclk1" type="clock" dir="start" />
<interface name="riffa_100" internal="pll_0.outclk5" type="clock" dir="start" />
<interface name="riffa_125" internal="pll_0.outclk6" type="clock" dir="start" />
<interface name="riffa_150" internal="pll_0.outclk7" type="clock" dir="start" />
<interface name="riffa_175" internal="pll_0.outclk8" type="clock" dir="start" />
<interface name="riffa_200" internal="pll_0.outclk9" type="clock" dir="start" />
<interface name="riffa_225" internal="pll_0.outclk10" type="clock" dir="start" />
<interface name="riffa_25" internal="pll_0.outclk2" type="clock" dir="start" />
<interface name="riffa_250" internal="pll_0.outclk11" type="clock" dir="start" />
<interface name="riffa_5" internal="pll_0.outclk0" type="clock" dir="start" />
<interface name="riffa_50" internal="pll_0.outclk3" type="clock" dir="start" />
<interface name="riffa_75" internal="pll_0.outclk4" type="clock" dir="start" />
<interface
name="rx_st"
internal="PCIeGen2x8If128.rx_st"
type="avalon_streaming"
dir="start" />
<interface
name="tx_st"
internal="PCIeGen2x8If128.tx_st"
type="avalon_streaming"
dir="end" />
<module
name="PCIeGen2x8If128"
kind="altera_pcie_sv_hip_ast"
version="16.0"
enabled="1">
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
<parameter name="advanced_default_hwtcl_atomic_malformed" value="true" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_32bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_64bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_routing" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_ssid_support" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_vga_enable" value="false" />
<parameter name="advanced_default_hwtcl_bypass_cdc" value="false" />
<parameter name="advanced_default_hwtcl_cas_completer_128bit" value="false" />
<parameter name="advanced_default_hwtcl_cdc_dummy_insert_limit" value="11" />
<parameter name="advanced_default_hwtcl_d0_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_support" value="false" />
<parameter name="advanced_default_hwtcl_d2_pme" value="false" />
<parameter name="advanced_default_hwtcl_d2_support" value="false" />
<parameter name="advanced_default_hwtcl_d3_cold_pme" value="false" />
<parameter name="advanced_default_hwtcl_d3_hot_pme" value="false" />
<parameter name="advanced_default_hwtcl_data_pack_rx" value="disable" />
<parameter name="advanced_default_hwtcl_deskew_comma" value="com_deskw" />
<parameter name="advanced_default_hwtcl_device_number" value="0" />
<parameter name="advanced_default_hwtcl_disable_link_x2_support" value="false" />
<parameter name="advanced_default_hwtcl_disable_snoop_packet" value="false" />
<parameter name="advanced_default_hwtcl_ei_delay_powerdown_count" value="10" />
<parameter name="advanced_default_hwtcl_eie_before_nfts_count" value="4" />
<parameter
name="advanced_default_hwtcl_enable_adapter_half_rate_mode"
value="false" />
<parameter name="advanced_default_hwtcl_enable_l1_aspm" value="false" />
<parameter name="advanced_default_hwtcl_enable_rx_buffer_checking" value="false" />
<parameter name="advanced_default_hwtcl_extended_format_field" value="false" />
<parameter name="advanced_default_hwtcl_extended_tag_reset" value="false" />
<parameter name="advanced_default_hwtcl_fc_init_timer" value="1024" />
<parameter name="advanced_default_hwtcl_flow_control_timeout_count" value="200" />
<parameter name="advanced_default_hwtcl_flow_control_update_count" value="30" />
<parameter name="advanced_default_hwtcl_flr_capability" value="false" />
<parameter name="advanced_default_hwtcl_gen2_diffclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_gen2_sameclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_hot_plug_support" value="0" />
<parameter name="advanced_default_hwtcl_interrupt_pin" value="inta" />
<parameter name="advanced_default_hwtcl_l01_entry_latency" value="31" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_diffclock" value="6" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_sameclock" value="6" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_diffclock" value="0" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_sameclock" value="0" />
<parameter name="advanced_default_hwtcl_low_priority_vc" value="single_vc" />
<parameter name="advanced_default_hwtcl_ltr_mechanism" value="false" />
<parameter name="advanced_default_hwtcl_ltssm_1ms_timeout" value="disable" />
<parameter name="advanced_default_hwtcl_ltssm_freqlocked_check" value="disable" />
<parameter name="advanced_default_hwtcl_maximum_current" value="0" />
<parameter name="advanced_default_hwtcl_no_command_completed" value="true" />
<parameter name="advanced_default_hwtcl_no_soft_reset" value="false" />
<parameter name="advanced_default_hwtcl_pclk_out_sel" value="pclk" />
<parameter name="advanced_default_hwtcl_pipex1_debug_sel" value="disable" />
<parameter name="advanced_default_hwtcl_register_pipe_signals" value="false" />
<parameter name="advanced_default_hwtcl_reserved_debug" value="0" />
<parameter
name="advanced_default_hwtcl_retry_buffer_last_active_address"
value="2047" />
<parameter name="advanced_default_hwtcl_rx_l0s_count_idl" value="0" />
<parameter name="advanced_default_hwtcl_set_l0s" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_gen3_count" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_schedule_count" value="0" />
<parameter name="advanced_default_hwtcl_ssid" value="0" />
<parameter name="advanced_default_hwtcl_ssvid" value="0" />
<parameter name="advanced_default_hwtcl_tph_completer" value="false" />
<parameter name="advanced_default_hwtcl_tx_cdc_almost_empty" value="5" />
<parameter name="advanced_default_hwtcl_vc0_clk_enable" value="true" />
<parameter name="advanced_default_hwtcl_wrong_device_id" value="disable" />
<parameter name="advanced_default_parameter_override" value="0" />
<parameter name="ast_width_hwtcl" value="Avalon-ST 128-bit" />
<parameter name="bar0_size_mask_hwtcl" value="10" />
<parameter name="bar0_type_hwtcl" value="2" />
<parameter name="bar1_size_mask_hwtcl" value="0" />
<parameter name="bar1_type_hwtcl" value="0" />
<parameter name="bar2_size_mask_hwtcl" value="0" />
<parameter name="bar2_type_hwtcl" value="0" />
<parameter name="bar3_size_mask_hwtcl" value="0" />
<parameter name="bar3_type_hwtcl" value="0" />
<parameter name="bar4_size_mask_hwtcl" value="0" />
<parameter name="bar4_type_hwtcl" value="0" />
<parameter name="bar5_size_mask_hwtcl" value="0" />
<parameter name="bar5_type_hwtcl" value="0" />
<parameter name="change_deemphasis_hwtcl" value="0" />
<parameter name="class_code_hwtcl" value="0" />
<parameter name="completion_timeout_hwtcl" value="ABCD" />
<parameter name="design_environment_hwtcl" value="QSYS" />
<parameter name="device_id_hwtcl" value="1" />
<parameter name="dll_active_report_support_hwtcl" value="0" />
<parameter name="ecrc_check_capable_hwtcl" value="0" />
<parameter name="ecrc_gen_capable_hwtcl" value="0" />
<parameter name="enable_completion_timeout_disable_hwtcl" value="1" />
<parameter name="enable_function_msix_support_hwtcl" value="0" />
<parameter name="enable_pcisigtest_hwtcl" value="0" />
<parameter name="enable_pipe32_phyip_ser_driver_hwtcl" value="0" />
<parameter name="enable_pipe32_sim_hwtcl" value="0" />
<parameter name="enable_power_on_rst_pulse_hwtcl" value="0" />
<parameter name="enable_slot_register_hwtcl" value="0" />
<parameter name="enable_tl_only_sim_hwtcl" value="0" />
<parameter name="endpoint_l0_latency_hwtcl" value="0" />
<parameter name="endpoint_l1_latency_hwtcl" value="0" />
<parameter name="expansion_base_address_register_hwtcl" value="0" />
<parameter name="extend_tag_field_hwtcl" value="64" />
<parameter name="fixed_preset_on" value="0" />
<parameter name="force_hrc" value="0" />
<parameter name="force_src" value="0" />
<parameter name="full_swing_hwtcl" value="35" />
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen2 (5.0 Gbps)" />
<parameter name="gen3_coeff_10_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_10_hwtcl" value="0" />
<parameter name="gen3_coeff_10_nxtber_less_hwtcl">g3_coeff_10_nxtber_less</parameter>
<parameter name="gen3_coeff_10_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_10_nxtber_more_hwtcl">g3_coeff_10_nxtber_more</parameter>
<parameter name="gen3_coeff_10_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_10_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_10_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_10_sel_hwtcl" value="preset_10" />
<parameter name="gen3_coeff_11_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_11_hwtcl" value="0" />
<parameter name="gen3_coeff_11_nxtber_less_hwtcl">g3_coeff_11_nxtber_less</parameter>
<parameter name="gen3_coeff_11_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_11_nxtber_more_hwtcl">g3_coeff_11_nxtber_more</parameter>
<parameter name="gen3_coeff_11_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_11_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_11_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_11_sel_hwtcl" value="preset_11" />
<parameter name="gen3_coeff_12_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_12_hwtcl" value="0" />
<parameter name="gen3_coeff_12_nxtber_less_hwtcl">g3_coeff_12_nxtber_less</parameter>
<parameter name="gen3_coeff_12_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_12_nxtber_more_hwtcl">g3_coeff_12_nxtber_more</parameter>
<parameter name="gen3_coeff_12_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_12_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_12_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_12_sel_hwtcl" value="preset_12" />
<parameter name="gen3_coeff_13_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_13_hwtcl" value="0" />
<parameter name="gen3_coeff_13_nxtber_less_hwtcl">g3_coeff_13_nxtber_less</parameter>
<parameter name="gen3_coeff_13_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_13_nxtber_more_hwtcl">g3_coeff_13_nxtber_more</parameter>
<parameter name="gen3_coeff_13_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_13_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_13_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_13_sel_hwtcl" value="preset_13" />
<parameter name="gen3_coeff_14_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_14_hwtcl" value="0" />
<parameter name="gen3_coeff_14_nxtber_less_hwtcl">g3_coeff_14_nxtber_less</parameter>
<parameter name="gen3_coeff_14_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_14_nxtber_more_hwtcl">g3_coeff_14_nxtber_more</parameter>
<parameter name="gen3_coeff_14_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_14_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_14_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_14_sel_hwtcl" value="preset_14" />
<parameter name="gen3_coeff_15_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_15_hwtcl" value="0" />
<parameter name="gen3_coeff_15_nxtber_less_hwtcl">g3_coeff_15_nxtber_less</parameter>
<parameter name="gen3_coeff_15_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_15_nxtber_more_hwtcl">g3_coeff_15_nxtber_more</parameter>
<parameter name="gen3_coeff_15_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_15_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_15_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_15_sel_hwtcl" value="preset_15" />
<parameter name="gen3_coeff_16_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_16_hwtcl" value="0" />
<parameter name="gen3_coeff_16_nxtber_less_hwtcl">g3_coeff_16_nxtber_less</parameter>
<parameter name="gen3_coeff_16_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_16_nxtber_more_hwtcl">g3_coeff_16_nxtber_more</parameter>
<parameter name="gen3_coeff_16_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_16_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_16_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_16_sel_hwtcl" value="preset_16" />
<parameter name="gen3_coeff_17_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_17_hwtcl" value="0" />
<parameter name="gen3_coeff_17_nxtber_less_hwtcl">g3_coeff_17_nxtber_less</parameter>
<parameter name="gen3_coeff_17_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_17_nxtber_more_hwtcl">g3_coeff_17_nxtber_more</parameter>
<parameter name="gen3_coeff_17_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_17_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_17_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_17_sel_hwtcl" value="preset_17" />
<parameter name="gen3_coeff_18_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_18_hwtcl" value="0" />
<parameter name="gen3_coeff_18_nxtber_less_hwtcl">g3_coeff_18_nxtber_less</parameter>
<parameter name="gen3_coeff_18_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_18_nxtber_more_hwtcl">g3_coeff_18_nxtber_more</parameter>
<parameter name="gen3_coeff_18_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_18_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_18_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_18_sel_hwtcl" value="preset_18" />
<parameter name="gen3_coeff_19_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_19_hwtcl" value="0" />
<parameter name="gen3_coeff_19_nxtber_less_hwtcl">g3_coeff_19_nxtber_less</parameter>
<parameter name="gen3_coeff_19_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_19_nxtber_more_hwtcl">g3_coeff_19_nxtber_more</parameter>
<parameter name="gen3_coeff_19_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_19_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_19_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_19_sel_hwtcl" value="preset_19" />
<parameter name="gen3_coeff_1_ber_meas_hwtcl" value="2" />
<parameter name="gen3_coeff_1_hwtcl" value="7" />
<parameter name="gen3_coeff_1_nxtber_less_hwtcl">g3_coeff_1_nxtber_less</parameter>
<parameter name="gen3_coeff_1_nxtber_less_ptr_hwtcl" value="1" />
<parameter name="gen3_coeff_1_nxtber_more_hwtcl">g3_coeff_1_nxtber_more</parameter>
<parameter name="gen3_coeff_1_nxtber_more_ptr_hwtcl" value="1" />
<parameter name="gen3_coeff_1_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_1_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_1_sel_hwtcl" value="preset_1" />
<parameter name="gen3_coeff_20_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_20_hwtcl" value="0" />
<parameter name="gen3_coeff_20_nxtber_less_hwtcl">g3_coeff_20_nxtber_less</parameter>
<parameter name="gen3_coeff_20_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_20_nxtber_more_hwtcl">g3_coeff_20_nxtber_more</parameter>
<parameter name="gen3_coeff_20_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_20_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_20_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_20_sel_hwtcl" value="preset_20" />
<parameter name="gen3_coeff_21_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_21_hwtcl" value="0" />
<parameter name="gen3_coeff_21_nxtber_less_hwtcl">g3_coeff_21_nxtber_less</parameter>
<parameter name="gen3_coeff_21_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_21_nxtber_more_hwtcl">g3_coeff_21_nxtber_more</parameter>
<parameter name="gen3_coeff_21_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_21_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_21_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_21_sel_hwtcl" value="preset_21" />
<parameter name="gen3_coeff_22_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_22_hwtcl" value="0" />
<parameter name="gen3_coeff_22_nxtber_less_hwtcl">g3_coeff_22_nxtber_less</parameter>
<parameter name="gen3_coeff_22_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_22_nxtber_more_hwtcl">g3_coeff_22_nxtber_more</parameter>
<parameter name="gen3_coeff_22_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_22_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_22_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_22_sel_hwtcl" value="preset_22" />
<parameter name="gen3_coeff_23_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_23_hwtcl" value="0" />
<parameter name="gen3_coeff_23_nxtber_less_hwtcl">g3_coeff_23_nxtber_less</parameter>
<parameter name="gen3_coeff_23_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_23_nxtber_more_hwtcl">g3_coeff_23_nxtber_more</parameter>
<parameter name="gen3_coeff_23_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_23_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_23_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_23_sel_hwtcl" value="preset_23" />
<parameter name="gen3_coeff_24_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_24_hwtcl" value="0" />
<parameter name="gen3_coeff_24_nxtber_less_hwtcl">g3_coeff_24_nxtber_less</parameter>
<parameter name="gen3_coeff_24_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_24_nxtber_more_hwtcl">g3_coeff_24_nxtber_more</parameter>
<parameter name="gen3_coeff_24_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_24_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_24_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_24_sel_hwtcl" value="preset_24" />
<parameter name="gen3_coeff_2_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_2_hwtcl" value="0" />
<parameter name="gen3_coeff_2_nxtber_less_hwtcl">g3_coeff_2_nxtber_less</parameter>
<parameter name="gen3_coeff_2_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_2_nxtber_more_hwtcl">g3_coeff_2_nxtber_more</parameter>
<parameter name="gen3_coeff_2_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_2_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_2_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_2_sel_hwtcl" value="preset_2" />
<parameter name="gen3_coeff_3_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_3_hwtcl" value="0" />
<parameter name="gen3_coeff_3_nxtber_less_hwtcl">g3_coeff_3_nxtber_less</parameter>
<parameter name="gen3_coeff_3_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_3_nxtber_more_hwtcl">g3_coeff_3_nxtber_more</parameter>
<parameter name="gen3_coeff_3_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_3_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_3_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_3_sel_hwtcl" value="preset_3" />
<parameter name="gen3_coeff_4_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_4_hwtcl" value="0" />
<parameter name="gen3_coeff_4_nxtber_less_hwtcl">g3_coeff_4_nxtber_less</parameter>
<parameter name="gen3_coeff_4_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_4_nxtber_more_hwtcl">g3_coeff_4_nxtber_more</parameter>
<parameter name="gen3_coeff_4_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_4_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_4_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_4_sel_hwtcl" value="preset_4" />
<parameter name="gen3_coeff_5_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_5_hwtcl" value="0" />
<parameter name="gen3_coeff_5_nxtber_less_hwtcl">g3_coeff_5_nxtber_less</parameter>
<parameter name="gen3_coeff_5_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_5_nxtber_more_hwtcl">g3_coeff_5_nxtber_more</parameter>
<parameter name="gen3_coeff_5_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_5_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_5_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_5_sel_hwtcl" value="preset_5" />
<parameter name="gen3_coeff_6_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_6_hwtcl" value="0" />
<parameter name="gen3_coeff_6_nxtber_less_hwtcl">g3_coeff_6_nxtber_less</parameter>
<parameter name="gen3_coeff_6_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_6_nxtber_more_hwtcl">g3_coeff_6_nxtber_more</parameter>
<parameter name="gen3_coeff_6_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_6_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_6_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_6_sel_hwtcl" value="preset_6" />
<parameter name="gen3_coeff_7_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_7_hwtcl" value="0" />
<parameter name="gen3_coeff_7_nxtber_less_hwtcl">g3_coeff_7_nxtber_less</parameter>
<parameter name="gen3_coeff_7_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_7_nxtber_more_hwtcl">g3_coeff_7_nxtber_more</parameter>
<parameter name="gen3_coeff_7_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_7_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_7_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_7_sel_hwtcl" value="preset_7" />
<parameter name="gen3_coeff_8_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_8_hwtcl" value="0" />
<parameter name="gen3_coeff_8_nxtber_less_hwtcl">g3_coeff_8_nxtber_less</parameter>
<parameter name="gen3_coeff_8_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_8_nxtber_more_hwtcl">g3_coeff_8_nxtber_more</parameter>
<parameter name="gen3_coeff_8_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_8_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_8_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_8_sel_hwtcl" value="preset_8" />
<parameter name="gen3_coeff_9_ber_meas_hwtcl" value="0" />
<parameter name="gen3_coeff_9_hwtcl" value="0" />
<parameter name="gen3_coeff_9_nxtber_less_hwtcl">g3_coeff_9_nxtber_less</parameter>
<parameter name="gen3_coeff_9_nxtber_less_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_9_nxtber_more_hwtcl">g3_coeff_9_nxtber_more</parameter>
<parameter name="gen3_coeff_9_nxtber_more_ptr_hwtcl" value="0" />
<parameter name="gen3_coeff_9_preset_hint_hwtcl" value="0" />
<parameter name="gen3_coeff_9_reqber_hwtcl" value="0" />
<parameter name="gen3_coeff_9_sel_hwtcl" value="preset_9" />
<parameter name="gen3_full_swing_hwtcl" value="35" />
<parameter name="gen3_low_freq_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_10_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_11_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_1_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_2_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_3_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_4_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_5_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_6_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_7_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_8_hwtcl" value="0" />
<parameter name="gen3_preset_coeff_9_hwtcl" value="0" />
<parameter name="gen3_rxfreqlock_counter_hwtcl" value="0" />
<parameter name="hip_reconfig_hwtcl" value="0" />
<parameter name="hip_tag_checking_hwtcl" value="1" />
<parameter name="hwtcl_override_g2_txvod" value="1" />
<parameter name="hwtcl_override_g3rxcoef" value="0" />
<parameter name="hwtcl_override_g3txcoef" value="0" />
<parameter name="in_cvp_mode_hwtcl" value="0" />
<parameter name="io_window_addr_width_hwtcl" value="0" />
<parameter name="lane_mask_hwtcl" value="x8" />
<parameter name="low_latency_mode_hwtcl" value="0" />
<parameter name="max_payload_size_hwtcl" value="256" />
<parameter name="msi_64bit_addressing_capable_hwtcl" value="true" />
<parameter name="msi_masking_capable_hwtcl" value="false" />
<parameter name="msi_multi_message_capable_hwtcl" value="1" />
<parameter name="msi_support_hwtcl" value="true" />
<parameter name="msix_pba_bir_hwtcl" value="0" />
<parameter name="msix_pba_offset_hwtcl" value="0" />
<parameter name="msix_table_bir_hwtcl" value="0" />
<parameter name="msix_table_offset_hwtcl" value="0" />
<parameter name="msix_table_size_hwtcl" value="0" />
<parameter name="multiple_packets_per_cycle_hwtcl" value="0" />
<parameter name="override_rxbuffer_cred_preset" value="0" />
<parameter name="override_tbpartner_driver_setting_hwtcl" value="0" />
<parameter name="pcie_inspector_hwtcl" value="0" />
<parameter name="pcie_qsys" value="1" />
<parameter name="pcie_spec_version_hwtcl" value="2.1" />
<parameter name="pll_refclk_freq_hwtcl" value="100 MHz" />
<parameter name="port_link_number_hwtcl" value="1" />
<parameter name="port_type_hwtcl" value="Native endpoint" />
<parameter name="prefetchable_mem_window_addr_width_hwtcl" value="0" />
<parameter name="revision_id_hwtcl" value="1" />
<parameter name="rpre_emph_a_val_hwtcl" value="9" />
<parameter name="rpre_emph_b_val_hwtcl" value="0" />
<parameter name="rpre_emph_c_val_hwtcl" value="16" />
<parameter name="rpre_emph_d_val_hwtcl" value="13" />
<parameter name="rpre_emph_e_val_hwtcl" value="5" />
<parameter name="rvod_sel_a_val_hwtcl" value="42" />
<parameter name="rvod_sel_b_val_hwtcl" value="38" />
<parameter name="rvod_sel_c_val_hwtcl" value="38" />
<parameter name="rvod_sel_d_val_hwtcl" value="43" />
<parameter name="rvod_sel_e_val_hwtcl" value="15" />
<parameter name="rxbuffer_rxreq_hwtcl" value="Minimum" />
<parameter name="serial_sim_hwtcl" value="1" />
<parameter name="set_pld_clk_x1_625MHz_hwtcl" value="0" />
<parameter name="slot_number_hwtcl" value="0" />
<parameter name="slot_power_limit_hwtcl" value="0" />
<parameter name="slot_power_scale_hwtcl" value="0" />
<parameter name="slotclkcfg_hwtcl" value="1" />
<parameter name="subsystem_device_id_hwtcl" value="0" />
<parameter name="subsystem_vendor_id_hwtcl" value="0" />
<parameter name="surprise_down_error_support_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw0_hwtcl" value="2049" />
<parameter name="tlp_insp_trg_dw1_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw2_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw3_hwtcl" value="0" />
<parameter name="tlp_inspector_hwtcl" value="0" />
<parameter name="tlp_inspector_use_signal_probe_hwtcl" value="0" />
<parameter name="track_rxfc_cplbuf_ovf_hwtcl" value="0" />
<parameter name="use_aer_hwtcl" value="0" />
<parameter name="use_ast_parity" value="0" />
<parameter name="use_atx_pll_hwtcl" value="0" />
<parameter name="use_config_bypass_hwtcl" value="0" />
<parameter name="use_crc_forwarding_hwtcl" value="0" />
<parameter name="use_cvp_update_core_pof_hwtcl" value="0" />
<parameter name="use_pci_ext_hwtcl" value="0" />
<parameter name="use_pcie_ext_hwtcl" value="0" />
<parameter name="use_rx_st_be_hwtcl" value="0" />
<parameter name="use_tx_cons_cred_sel_hwtcl" value="0" />
<parameter name="user_id_hwtcl" value="0" />
<parameter name="vendor_id_hwtcl" value="4466" />
<parameter name="vsec_id_hwtcl" value="40960" />
<parameter name="vsec_rev_hwtcl" value="0" />
</module>
<module
name="XCVRCtrlGen2x8"
kind="alt_xcvr_reconfig"
version="16.0"
enabled="1">
<parameter name="ber_en" value="0" />
<parameter name="device_family" value="Stratix V" />
<parameter name="enable_adce" value="0" />
<parameter name="enable_analog" value="1" />
<parameter name="enable_dcd" value="0" />
<parameter name="enable_dcd_power_up" value="1" />
<parameter name="enable_dfe" value="0" />
<parameter name="enable_eyemon" value="0" />
<parameter name="enable_mif" value="0" />
<parameter name="enable_offset" value="1" />
<parameter name="gui_cal_status_port" value="false" />
<parameter name="gui_enable_pll" value="0" />
<parameter name="gui_split_sizes" value="" />
<parameter name="number_of_reconfig_interfaces" value="10" />
</module>
<module
name="XCVRDrvGen2x8"
kind="altera_pcie_reconfig_driver"
version="16.0"
enabled="1">
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
<parameter name="enable_cal_busy_hwtcl" value="0" />
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen2 (5.0 Gbps)" />
<parameter name="number_of_reconfig_interfaces" value="10" />
</module>
<module name="clk_0" kind="clock_source" version="16.0" enabled="1">
<parameter name="clockFrequency" value="50000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module name="pll_0" kind="altera_pll" version="16.0" enabled="1">
<parameter name="debug_print_output" value="false" />
<parameter name="debug_use_rbc_taf_method" value="false" />
<parameter name="device" value="5SGXEA7N2F45C2" />
<parameter name="device_family" value="Stratix V" />
<parameter name="gui_active_clk" value="false" />
<parameter name="gui_actual_output_clock_frequency0" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency1" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency10" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency11" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency12" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency13" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency14" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency15" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency16" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency17" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency2" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency3" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency4" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency5" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency6" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency7" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency8" value="0 MHz" />
<parameter name="gui_actual_output_clock_frequency9" value="0 MHz" />
<parameter name="gui_actual_phase_shift0" value="0" />
<parameter name="gui_actual_phase_shift1" value="0" />
<parameter name="gui_actual_phase_shift10" value="0" />
<parameter name="gui_actual_phase_shift11" value="0" />
<parameter name="gui_actual_phase_shift12" value="0" />
<parameter name="gui_actual_phase_shift13" value="0" />
<parameter name="gui_actual_phase_shift14" value="0" />
<parameter name="gui_actual_phase_shift15" value="0" />
<parameter name="gui_actual_phase_shift16" value="0" />
<parameter name="gui_actual_phase_shift17" value="0" />
<parameter name="gui_actual_phase_shift2" value="0" />
<parameter name="gui_actual_phase_shift3" value="0" />
<parameter name="gui_actual_phase_shift4" value="0" />
<parameter name="gui_actual_phase_shift5" value="0" />
<parameter name="gui_actual_phase_shift6" value="0" />
<parameter name="gui_actual_phase_shift7" value="0" />
<parameter name="gui_actual_phase_shift8" value="0" />
<parameter name="gui_actual_phase_shift9" value="0" />
<parameter name="gui_cascade_counter0" value="false" />
<parameter name="gui_cascade_counter1" value="false" />
<parameter name="gui_cascade_counter10" value="false" />
<parameter name="gui_cascade_counter11" value="false" />
<parameter name="gui_cascade_counter12" value="false" />
<parameter name="gui_cascade_counter13" value="false" />
<parameter name="gui_cascade_counter14" value="false" />
<parameter name="gui_cascade_counter15" value="false" />
<parameter name="gui_cascade_counter16" value="false" />
<parameter name="gui_cascade_counter17" value="false" />
<parameter name="gui_cascade_counter2" value="false" />
<parameter name="gui_cascade_counter3" value="false" />
<parameter name="gui_cascade_counter4" value="false" />
<parameter name="gui_cascade_counter5" value="false" />
<parameter name="gui_cascade_counter6" value="false" />
<parameter name="gui_cascade_counter7" value="false" />
<parameter name="gui_cascade_counter8" value="false" />
<parameter name="gui_cascade_counter9" value="false" />
<parameter name="gui_cascade_outclk_index" value="0" />
<parameter name="gui_channel_spacing" value="0.0" />
<parameter name="gui_clk_bad" value="false" />
<parameter name="gui_device_speed_grade" value="1" />
<parameter name="gui_divide_factor_c0" value="1" />
<parameter name="gui_divide_factor_c1" value="1" />
<parameter name="gui_divide_factor_c10" value="1" />
<parameter name="gui_divide_factor_c11" value="1" />
<parameter name="gui_divide_factor_c12" value="1" />
<parameter name="gui_divide_factor_c13" value="1" />
<parameter name="gui_divide_factor_c14" value="1" />
<parameter name="gui_divide_factor_c15" value="1" />
<parameter name="gui_divide_factor_c16" value="1" />
<parameter name="gui_divide_factor_c17" value="1" />
<parameter name="gui_divide_factor_c2" value="1" />
<parameter name="gui_divide_factor_c3" value="1" />
<parameter name="gui_divide_factor_c4" value="1" />
<parameter name="gui_divide_factor_c5" value="1" />
<parameter name="gui_divide_factor_c6" value="1" />
<parameter name="gui_divide_factor_c7" value="1" />
<parameter name="gui_divide_factor_c8" value="1" />
<parameter name="gui_divide_factor_c9" value="1" />
<parameter name="gui_divide_factor_n" value="1" />
<parameter name="gui_dps_cntr" value="C0" />
<parameter name="gui_dps_dir" value="Positive" />
<parameter name="gui_dps_num" value="1" />
<parameter name="gui_dsm_out_sel" value="1st_order" />
<parameter name="gui_duty_cycle0" value="50" />
<parameter name="gui_duty_cycle1" value="50" />
<parameter name="gui_duty_cycle10" value="50" />
<parameter name="gui_duty_cycle11" value="50" />
<parameter name="gui_duty_cycle12" value="50" />
<parameter name="gui_duty_cycle13" value="50" />
<parameter name="gui_duty_cycle14" value="50" />
<parameter name="gui_duty_cycle15" value="50" />
<parameter name="gui_duty_cycle16" value="50" />
<parameter name="gui_duty_cycle17" value="50" />
<parameter name="gui_duty_cycle2" value="50" />
<parameter name="gui_duty_cycle3" value="50" />
<parameter name="gui_duty_cycle4" value="50" />
<parameter name="gui_duty_cycle5" value="50" />
<parameter name="gui_duty_cycle6" value="50" />
<parameter name="gui_duty_cycle7" value="50" />
<parameter name="gui_duty_cycle8" value="50" />
<parameter name="gui_duty_cycle9" value="50" />
<parameter name="gui_en_adv_params" value="false" />
<parameter name="gui_en_dps_ports" value="false" />
<parameter name="gui_en_phout_ports" value="false" />
<parameter name="gui_en_reconf" value="false" />
<parameter name="gui_enable_cascade_in" value="false" />
<parameter name="gui_enable_cascade_out" value="false" />
<parameter name="gui_enable_mif_dps" value="false" />
<parameter name="gui_feedback_clock" value="Global Clock" />
<parameter name="gui_frac_multiply_factor" value="1" />
<parameter name="gui_fractional_cout" value="32" />
<parameter name="gui_mif_generate" value="false" />
<parameter name="gui_multiply_factor" value="1" />
<parameter name="gui_number_of_clocks" value="12" />
<parameter name="gui_operation_mode" value="direct" />
<parameter name="gui_output_clock_frequency0" value="5.0" />
<parameter name="gui_output_clock_frequency1" value="10.0" />
<parameter name="gui_output_clock_frequency10" value="225.0" />
<parameter name="gui_output_clock_frequency11" value="250.0" />
<parameter name="gui_output_clock_frequency12" value="100.0" />
<parameter name="gui_output_clock_frequency13" value="100.0" />
<parameter name="gui_output_clock_frequency14" value="100.0" />
<parameter name="gui_output_clock_frequency15" value="100.0" />
<parameter name="gui_output_clock_frequency16" value="100.0" />
<parameter name="gui_output_clock_frequency17" value="100.0" />
<parameter name="gui_output_clock_frequency2" value="25.0" />
<parameter name="gui_output_clock_frequency3" value="50.0" />
<parameter name="gui_output_clock_frequency4" value="75.0" />
<parameter name="gui_output_clock_frequency5" value="100.0" />
<parameter name="gui_output_clock_frequency6" value="125.0" />
<parameter name="gui_output_clock_frequency7" value="150.0" />
<parameter name="gui_output_clock_frequency8" value="175.0" />
<parameter name="gui_output_clock_frequency9" value="200.0" />
<parameter name="gui_phase_shift0" value="0" />
<parameter name="gui_phase_shift1" value="0" />
<parameter name="gui_phase_shift10" value="0" />
<parameter name="gui_phase_shift11" value="0" />
<parameter name="gui_phase_shift12" value="0" />
<parameter name="gui_phase_shift13" value="0" />
<parameter name="gui_phase_shift14" value="0" />
<parameter name="gui_phase_shift15" value="0" />
<parameter name="gui_phase_shift16" value="0" />
<parameter name="gui_phase_shift17" value="0" />
<parameter name="gui_phase_shift2" value="0" />
<parameter name="gui_phase_shift3" value="0" />
<parameter name="gui_phase_shift4" value="0" />
<parameter name="gui_phase_shift5" value="0" />
<parameter name="gui_phase_shift6" value="0" />
<parameter name="gui_phase_shift7" value="0" />
<parameter name="gui_phase_shift8" value="0" />
<parameter name="gui_phase_shift9" value="0" />
<parameter name="gui_phase_shift_deg0" value="0.0" />
<parameter name="gui_phase_shift_deg1" value="0.0" />
<parameter name="gui_phase_shift_deg10" value="0.0" />
<parameter name="gui_phase_shift_deg11" value="0.0" />
<parameter name="gui_phase_shift_deg12" value="0.0" />
<parameter name="gui_phase_shift_deg13" value="0.0" />
<parameter name="gui_phase_shift_deg14" value="0.0" />
<parameter name="gui_phase_shift_deg15" value="0.0" />
<parameter name="gui_phase_shift_deg16" value="0.0" />
<parameter name="gui_phase_shift_deg17" value="0.0" />
<parameter name="gui_phase_shift_deg2" value="0.0" />
<parameter name="gui_phase_shift_deg3" value="0.0" />
<parameter name="gui_phase_shift_deg4" value="0.0" />
<parameter name="gui_phase_shift_deg5" value="0.0" />
<parameter name="gui_phase_shift_deg6" value="0.0" />
<parameter name="gui_phase_shift_deg7" value="0.0" />
<parameter name="gui_phase_shift_deg8" value="0.0" />
<parameter name="gui_phase_shift_deg9" value="0.0" />
<parameter name="gui_phout_division" value="1" />
<parameter name="gui_pll_auto_reset" value="Off" />
<parameter name="gui_pll_bandwidth_preset" value="Auto" />
<parameter name="gui_pll_cascading_mode">Create an adjpllin signal to connect with an upstream PLL</parameter>
<parameter name="gui_pll_mode" value="Integer-N PLL" />
<parameter name="gui_ps_units0" value="ps" />
<parameter name="gui_ps_units1" value="ps" />
<parameter name="gui_ps_units10" value="ps" />
<parameter name="gui_ps_units11" value="ps" />
<parameter name="gui_ps_units12" value="ps" />
<parameter name="gui_ps_units13" value="ps" />
<parameter name="gui_ps_units14" value="ps" />
<parameter name="gui_ps_units15" value="ps" />
<parameter name="gui_ps_units16" value="ps" />
<parameter name="gui_ps_units17" value="ps" />
<parameter name="gui_ps_units2" value="ps" />
<parameter name="gui_ps_units3" value="ps" />
<parameter name="gui_ps_units4" value="ps" />
<parameter name="gui_ps_units5" value="ps" />
<parameter name="gui_ps_units6" value="ps" />
<parameter name="gui_ps_units7" value="ps" />
<parameter name="gui_ps_units8" value="ps" />
<parameter name="gui_ps_units9" value="ps" />
<parameter name="gui_refclk1_frequency" value="100.0" />
<parameter name="gui_refclk_switch" value="false" />
<parameter name="gui_reference_clock_frequency" value="50.0" />
<parameter name="gui_switchover_delay" value="0" />
<parameter name="gui_switchover_mode">Automatic Switchover</parameter>
<parameter name="gui_use_locked" value="false" />
</module>
<connection
kind="avalon"
version="16.0"
start="XCVRDrvGen2x8.reconfig_mgmt"
end="XCVRCtrlGen2x8.reconfig_mgmt">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection kind="clock" version="16.0" start="clk_0.clk" end="pll_0.refclk" />
<connection
kind="conduit"
version="16.0"
start="XCVRDrvGen2x8.hip_currentspeed"
end="PCIeGen2x8If128.hip_currentspeed">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRDrvGen2x8.reconfig_busy"
end="XCVRCtrlGen2x8.reconfig_busy">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRCtrlGen2x8.reconfig_from_xcvr"
end="PCIeGen2x8If128.reconfig_from_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="16.0"
start="XCVRCtrlGen2x8.reconfig_to_xcvr"
end="PCIeGen2x8If128.reconfig_to_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection kind="reset" version="16.0" start="clk_0.clk_reset" end="pll_0.reset" />
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.0 Build 145 04/22/2015 SJ Full Version
# Date created = 11:11:58 January 20, 2016
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "15.0"
DATE = "11:11:58 January 20, 2016"
# Revisions
PROJECT_REVISION = "DE5QGen2x8If128"

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.1.0 Build 162 10/23/2013 SJ Full Version
# Date created = 11:03:06 March 21, 2014
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# DE5QGen2x8If128_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Stratix V"
set_global_assignment -name DEVICE 5SGXEA7N2F45C2
set_global_assignment -name TOP_LEVEL_ENTITY DE5QGen2x8If128
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:03:06 MARCH 21, 2014"
set_global_assignment -name LAST_QUARTUS_VERSION 15.1.0
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ../bit/
################################################################################
# Timing SDC Files
################################################################################
################################################################################
# PCIE Connections
################################################################################
# PCIe clk (100 MHz)
set_location_assignment PIN_AK38 -to PCIE_REFCLK
set_instance_assignment -name IO_STANDARD HCSL -to PCIE_REFCLK
set_location_assignment PIN_AU33 -to PCIE_RESET_N
set_instance_assignment -name IO_STANDARD "2.5 V" -to PCIE_RESET_N
################################################################################
#PCIE Pins
################################################################################
# Settings from SV PCIE User Guide (AV-ST)
# - 1.5V PCML
# - XCVR_VCCR_VCCT_VOLTAGE 1_0V
# - XCVR_VCCA_VOLTAGE 3_0V
# (SV User guide recommends VCCR/VCCT = 0_9 and VCCA = 2_5 , but link does not
# train correctly if these settings are used)
#
# We use CMU PLL's (http://www.altera.com/literature/hb/stratix-v/stx5_52003.pdf)
# Errata: http://www.altera.com/support/kdb/solutions/rd10112012_529.html
################################################################################
# Gloabal PCIE assignments (Use if signal problems exist)
################################################################################
# set_instance_assignment -name INPUT_TERMINATION "OCT 100 OHMS" -to PCIE_RX_IN[*]
# set_instance_assignment -name INPUT_TERMINATION "OCT 100 OHMS" -to "PCIE_RX_IN[*](n)"
# set_instance_assignment -name XCVR_RX_SD_OFF 5 -to PCIE_RX_IN[*]
# set_instance_assignment -name XCVR_RX_SD_OFF 5 -to "PCIE_RX_IN[*](n)"
# set_instance_assignment -name XCVR_RX_SD_ON 1 -to PCIE_RX_IN[*]
# set_instance_assignment -name XCVR_RX_SD_ON 1 -to "PCIE_RX_IN[*](n)"
# set_instance_assignment -name XCVR_RX_COMMON_MODE_VOLTAGE VTT_0P70V -to PCIE_RX_IN[*]
# set_instance_assignment -name XCVR_RX_COMMON_MODE_VOLTAGE VTT_0P70V -to "PCIE_RX_IN[*](n)"
# set_instance_assignment -name XCVR_RX_SD_THRESHOLD 4 -to PCIE_RX_IN[*]
# set_instance_assignment -name XCVR_RX_SD_THRESHOLD 4 -to "PCIE_RX_IN[*](n)"
# set_instance_assignment -name INPUT_TERMINATION "OCT 100 OHMS" -to PCIE_TX_OUT[*]
# set_instance_assignment -name INPUT_TERMINATION "OCT 100 OHMS" -to "PCIE_TX_OUT[*](n)"
# set_instance_assignment -name XCVR_RX_SD_OFF 5 -to PCIE_TX_OUT[*]
# set_instance_assignment -name XCVR_RX_SD_OFF 5 -to "PCIE_TX_OUT[*](n)"
# set_instance_assignment -name XCVR_RX_SD_ON 1 -to PCIE_TX_OUT[*]
# set_instance_assignment -name XCVR_RX_SD_ON 1 -to "PCIE_TX_OUT[*](n)"
# set_instance_assignment -name XCVR_RX_COMMON_MODE_VOLTAGE VTT_0P70V -to PCIE_TX_OUT[*]
# set_instance_assignment -name XCVR_RX_COMMON_MODE_VOLTAGE VTT_0P70V -to "PCIE_TX_OUT[*](n)"
# set_instance_assignment -name XCVR_RX_SD_THRESHOLD 4 -to PCIE_TX_OUT[*]
# set_instance_assignment -name XCVR_RX_SD_THRESHOLD 4 -to "PCIE_TX_OUT[*](n)"
################################################################################
#PCIE RX_IN 0
################################################################################
set_location_assignment PIN_BB43 -to PCIE_RX_IN[0]
set_location_assignment PIN_BB44 -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[0]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[0]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[0](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[0](n)"
################################################################################
#PCIE RX_IN 1
################################################################################
set_location_assignment PIN_BA41 -to PCIE_RX_IN[1]
set_location_assignment PIN_BA42 -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[1]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[1]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[1](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[1](n)"
################################################################################
#PCIE RX_IN 2
################################################################################
set_location_assignment PIN_AW41 -to PCIE_RX_IN[2]
set_location_assignment PIN_AW42 -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[2]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[2]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[2](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[2](n)"
################################################################################
#PCIE RX_IN 3
################################################################################
set_location_assignment PIN_AY43 -to PCIE_RX_IN[3]
set_location_assignment PIN_AY44 -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[3]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[3]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[3](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[3](n)"
################################################################################
#PCIE RX_IN 4
################################################################################
set_location_assignment PIN_AT43 -to PCIE_RX_IN[4]
set_location_assignment PIN_AT44 -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[4]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[4]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[4](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[4](n)"
################################################################################
#PCIE RX_IN 5
################################################################################
set_location_assignment PIN_AP43 -to PCIE_RX_IN[5]
set_location_assignment PIN_AP44 -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[5]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[5]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[5](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[5](n)"
################################################################################
#PCIE RX_IN 6
################################################################################
set_location_assignment PIN_AM43 -to PCIE_RX_IN[6]
set_location_assignment PIN_AM44 -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[6]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[6]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[6](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[6](n)"
################################################################################
#PCIE RX_IN 7
################################################################################
set_location_assignment PIN_AK43 -to PCIE_RX_IN[7]
set_location_assignment PIN_AK44 -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_RX_IN[7]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_RX_IN[7]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_RX_IN[7](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_RX_IN[7](n)"
################################################################################
#PCIE TX_OUT 0
################################################################################
set_location_assignment PIN_AY39 -to PCIE_TX_OUT[0]
set_location_assignment PIN_AY40 -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[0]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[0]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[0](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[0](n)"
################################################################################
#PCIE TX_OUT 1
################################################################################
set_location_assignment PIN_AV39 -to PCIE_TX_OUT[1]
set_location_assignment PIN_AV40 -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[1]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[1]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[1](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[1](n)"
################################################################################
#PCIE TX_OUT 2
################################################################################
set_location_assignment PIN_AT39 -to PCIE_TX_OUT[2]
set_location_assignment PIN_AT40 -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[2]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[2]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[2](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[2](n)"
################################################################################
#PCIE TX_OUT 3
################################################################################
set_location_assignment PIN_AU41 -to PCIE_TX_OUT[3]
set_location_assignment PIN_AU42 -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[3]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[3]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[3](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[3](n)"
################################################################################
#PCIE TX_OUT 4
################################################################################
set_location_assignment PIN_AN41 -to PCIE_TX_OUT[4]
set_location_assignment PIN_AN42 -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[4]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[4]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[4](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[4](n)"
################################################################################
#PCIE TX_OUT 5
################################################################################
set_location_assignment PIN_AL41 -to PCIE_TX_OUT[5]
set_location_assignment PIN_AL42 -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[5]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[5]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[5](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[5](n)"
################################################################################
#PCIE TX_OUT 6
################################################################################
set_location_assignment PIN_AJ41 -to PCIE_TX_OUT[6]
set_location_assignment PIN_AJ42 -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[6]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[6]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[6](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[6](n)"
################################################################################
#PCIE TX_OUT 7
################################################################################
set_location_assignment PIN_AG41 -to PCIE_TX_OUT[7]
set_location_assignment PIN_AG42 -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to PCIE_TX_OUT[7]
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to PCIE_TX_OUT[7]
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_ANALOG_SETTINGS_PROTOCOL PCIE_GEN2 -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to "PCIE_TX_OUT[7](n)"
set_instance_assignment -name XCVR_VCCA_VOLTAGE 3_0V -to "PCIE_TX_OUT[7](n)"
################################################################################
# LED's
################################################################################
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[0]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[1]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[2]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[4]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[5]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[6]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[7]
set_location_assignment PIN_AW37 -to LED[0]
set_location_assignment PIN_AV37 -to LED[1]
set_location_assignment PIN_BB36 -to LED[2]
set_location_assignment PIN_BB39 -to LED[3]
set_location_assignment PIN_AH15 -to LED[4]
set_location_assignment PIN_AH13 -to LED[5]
set_location_assignment PIN_AJ13 -to LED[6]
set_location_assignment PIN_AJ14 -to LED[7]
################################################################################
# OSCILLATORS
################################################################################
set_location_assignment PIN_BC28 -to OSC_BANK3D_50MHZ
set_instance_assignment -name IO_STANDARD "1.8 V" -to OSC_BANK3D_50MHZ
################################################################################
# End Custom Instantiations
################################################################################
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name QSYS_FILE ../ip/QSysDE5QGen2x8If128.qsys
set_global_assignment -name SDC_FILE ../constr/DE5QGen2x8If128.sdc
set_global_assignment -name SEARCH_PATH ../../../../riffa_hdl
set_global_assignment -name VERILOG_FILE ../hdl/DE5QGen2x8If128.v
set_global_assignment -name VERILOG_FILE ../../riffa_wrapper_de5.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_extender.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_controller.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/txr_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/txc_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_writer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_monitor_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_channel_gate_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_buffer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_port_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_multiplexer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_hdr_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine_selector.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_engine.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_shift.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_data_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/tx_alignment_pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/translation_altera.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/syncff.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sync_fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/shiftreg.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_requester.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/sg_list_reader_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/scsdpram.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rxr_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rxc_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_requester_mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_reader.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_channel_gate.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_port_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rx_engine_classic.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/rotate.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/riffa.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue_output.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue_input.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reorder_queue.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/registers.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/register.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/recv_credit_flow_ctrl.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ram_2clk_1w_1r.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ram_1clk_1w_1r.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/pipeline.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/one_hot_mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ohtb.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/offset_to_mask.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/offset_flag_to_one_hot.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/mux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/interrupt_controller.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/interrupt.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo_packer_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/fifo.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/ff.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/engine_layer.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/demux.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/cross_domain_signal.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/counter.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/chnl_tester.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_128.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_64.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel_32.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/channel.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/async_fifo_fwft.v
set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/async_fifo.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

29
fpga/riffa_hdl/tx_port_monitor_128.v
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@ -224,33 +224,4 @@ always @ (*) begin
_rAlmostAllRecvd = ((rWordsRecvdAdv >= LEN) && wPayloadData);
end
/*
wire [35:0] wControl0;
chipscope_icon_1 cs_icon(
.CONTROL0(wControl0)
);
chipscope_ila_t8_512 a0(
.CLK(CLK),
.CONTROL(wControl0),
.TRIG0({TXN, wPayloadData, wEventData, rState}),
.DATA({201'd0,
rWordsRecvd, // 32
WR_COUNT, // 10
wPayloadData, // 1
EVT_DATA_RD_EN, // 1
RST, // 1
rTxErr, // 1
wEventData, // 1
rReadData, // 64
OFF, // 31
LEN, // 32
LAST, // 1
TXN, // 1
EVT_DATA_EMPTY, // 1
EVT_DATA, // 129
rState}) // 5
);
*/
endmodule

2
fpga/riffa_hdl/tx_port_monitor_32.v
View File

@ -204,7 +204,7 @@ always @ (*) begin
_rDataValid = ((rDataValid<<1) | (rRead & !EVT_DATA_EMPTY));
// Read until we get a (valid) event
_rRead = (!rState[2] & !(rState[1] & rEvent) & !wEventData & !rAlmostFull); // !S_TXPORTMON32_TXN
_rRead = (!rState[2] & !(rState[1] & (rEvent | wEventData | ~EVT_DATA_EMPTY)) & !wEventData & !rAlmostFull); // !S_TXPORTMON32_TXN
// Track detected events
_rEvent = wEventData;

31
fpga/riffa_hdl/tx_port_monitor_64.v
View File

@ -99,7 +99,6 @@ reg rLenEQ0Lo=0, _rLenEQ0Lo=0;
reg rLenLE2Lo=0, _rLenLE2Lo=0;
reg rTxErr=0, _rTxErr=0;
wire wEventData = (rDataValid[0] & EVT_DATA[C_DATA_WIDTH]);
wire wPayloadData = (rDataValid[0] & !EVT_DATA[C_DATA_WIDTH] & rState[3]); // S_TXPORTMON64_READ
wire wAllWordsRecvd = ((rAlmostAllRecvd | (rLenEQ0Hi & rLenLE2Lo)) & wPayloadData);
@ -201,7 +200,7 @@ always @ (*) begin
_rDataValid = ((rDataValid<<1) | (rRead & !EVT_DATA_EMPTY));
// Read until we get a (valid) event
_rRead = (!rState[2] & !(rState[1] & rEvent) & !wEventData & !rAlmostFull); // !S_TXPORTMON64_TXN
_rRead = (!rState[2] & !(rState[1] & (rEvent | wEventData | ~EVT_DATA_EMPTY)) & !wEventData & !rAlmostFull); // !S_TXPORTMON64_TXN
// Track detected events
_rEvent = wEventData;
@ -225,32 +224,4 @@ always @ (*) begin
_rAlmostAllRecvd = ((rWordsRecvdAdv >= LEN) && wPayloadData);
end
/*
wire [35:0] wControl0;
chipscope_icon_1 cs_icon(
.CONTROL0(wControl0)
);
chipscope_ila_t8_512 a0(
.CLK(CLK),
.CONTROL(wControl0),
.TRIG0({TXN, wPayloadData, wEventData, rState}),
.DATA({297'd0,
WR_COUNT, // 10
wPayloadData, // 1
EVT_DATA_RD_EN, // 1
RST, // 1
rTxErr, // 1
wEventData, // 1
rReadData, // 64
OFF, // 31
LEN, // 32
LAST, // 1
TXN, // 1
EVT_DATA_EMPTY, // 1
EVT_DATA, // 65
rState}) // 5
);
*/
endmodule

62
fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/Makefile Normal file
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@ -0,0 +1,62 @@
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#-----------------------------------------------------------------------
# Filename: Makefile
# Version: 1.0
# Description: Project-level makefile for building an example project
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------
# This make file expects the following variables to be set:
# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory.
# BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to
# BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory
WIDTH=64
TYPE=ultrascale
CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
PROJECT=$(shell basename $(CURRENT_PATH))
ifndef RIFFA_HDL_PATH
RIFFA_HDL_PATH:=../../../riffa_hdl
endif
ifndef BOARD_PATH
BOARD_PATH:=..
endif
ifndef JOBS
JOBS=1
endif
include $(RIFFA_HDL_PATH)/riffa.mk
include $(BOARD_PATH)/board.mk
PROJECT_IP+=ip/PCIeGen1x8If64.xci

BIN
fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/bit/VC709_Gen1x8If64.bit Normal file
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Binary file not shown.

151
fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/constr/VC709_Gen1x8If64.xdc Normal file
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@ -0,0 +1,151 @@
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#----------------------------------------------------------------------------
# Filename: VC709_Top.xdc
# Version: 1.00.a
# Verilog Standard: Verilog-2001
# Description: Xilinx Design Constraints for the VC709 board.
# These constrain the PCIE_REFCLK, its DSBUF, LED Pins, and PCIE_RESET_N pin
#
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------------
#
#########################################################################################################################
# User Constraints
#########################################################################################################################
###############################################################################
# User Time Names / User Time Groups / Time Specs
###############################################################################
###############################################################################
# User Physical Constraints
###############################################################################
#
# LED Status Indicators for Example Design.
# LED 0-2 should be all ON if link is up and functioning correctly
# LED 3 should be blinking if user application is receiving valid clock
#
#System Reset, User Reset, User Link Up, User Clk Heartbeat
set_property PACKAGE_PIN AM39 [get_ports {LED[0]}]
set_property PACKAGE_PIN AN39 [get_ports {LED[1]}]
set_property PACKAGE_PIN AR37 [get_ports {LED[2]}]
set_property PACKAGE_PIN AT37 [get_ports {LED[3]}]
set_property PACKAGE_PIN AR35 [get_ports {LED[4]}]
set_property PACKAGE_PIN AP41 [get_ports {LED[5]}]
set_property PACKAGE_PIN AP42 [get_ports {LED[6]}]
set_property PACKAGE_PIN AU39 [get_ports {LED[7]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[1]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[2]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[3]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[4]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[5]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[6]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[7]}]
set_false_path -to [get_ports -filter NAME=~LED*]
#########################################################################################################################
# End User Constraints
#########################################################################################################################
#
#
#
#########################################################################################################################
# PCIE Core Constraints
#########################################################################################################################
#
# SYS reset (input) signal. The sys_reset_n signal should be
# obtained from the PCI Express interface if possible. For
# slot based form factors, a system reset signal is usually
# present on the connector. For cable based form factors, a
# system reset signal may not be available. In this case, the
# system reset signal must be generated locally by some form of
# supervisory circuit. You may change the IOSTANDARD and LOC
# to suit your requirements and VCCO voltage banking rules.
# Some 7 series devices do not have 3.3 V I/Os available.
# Therefore the appropriate level shift is required to operate
# with these devices that contain only 1.8 V banks.
#
set_property PACKAGE_PIN AV35 [get_ports PCIE_RESET_N]
set_property IOSTANDARD LVCMOS18 [get_ports PCIE_RESET_N]
set_property PULLUP true [get_ports PCIE_RESET_N]
#
#
# SYS clock 100 MHz (input) signal. The sys_clk_p and sys_clk_n
# signals are the PCI Express reference clock. Virtex-7 GT
# Transceiver architecture requires the use of a dedicated clock
# resources (FPGA input pins) associated with each GT Transceiver.
# To use these pins an IBUFDS primitive (refclk_ibuf) is
# instantiated in user's design.
# Please refer to the Virtex-7 GT Transceiver User Guide
# (UG) for guidelines regarding clock resource selection.
#
set_property LOC IBUFDS_GTE2_X1Y11 [get_cells refclk_ibuf]
###############################################################################
# Timing Constraints
###############################################################################
create_clock -period 10.000 -name pcie_refclk [get_pins refclk_ibuf/O]
###############################################################################
# Physical Constraints
###############################################################################
set_false_path -from [get_ports PCIE_RESET_N]
###############################################################################
# End
###############################################################################
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]] -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT0]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT2]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT3]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT4]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT5]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT0]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT2]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT3]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT4]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT5]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]

790
fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/hdl/VC709_Gen1x8If64.v Normal file
View File

@ -0,0 +1,790 @@
// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following
// disclaimer in the documentation and/or other materials provided
// with the distribution.
//
// * Neither the name of The Regents of the University of California
// nor the names of its contributors may be used to endorse or
// promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
// UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
// ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
// TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
// USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
// DAMAGE.
// ----------------------------------------------------------------------
//----------------------------------------------------------------------------
// Filename: VC709_Gen1x8If64.v
// Version: 1.00.a
// Verilog Standard: Verilog-2001
// Description: Top level module for RIFFA 2.2 reference design for the
// the Xilinx VC709 Development Board.
// Author: Dustin Richmond (@darichmond)
//-----------------------------------------------------------------------------
`include "functions.vh"
`include "riffa.vh"
`include "ultrascale.vh"
`timescale 1ps / 1ps
module VC709_Gen1x8If64
#(// Number of RIFFA Channels
parameter C_NUM_CHNL = 12,
// Number of PCIe Lanes
parameter C_NUM_LANES = 8,
// Settings from Vivado IP Generator
parameter C_PCI_DATA_WIDTH = 64,
parameter C_MAX_PAYLOAD_BYTES = 256,
parameter C_LOG_NUM_TAGS = 6)
(output [(C_NUM_LANES - 1) : 0] PCI_EXP_TXP,
output [(C_NUM_LANES - 1) : 0] PCI_EXP_TXN,
input [(C_NUM_LANES - 1) : 0] PCI_EXP_RXP,
input [(C_NUM_LANES - 1) : 0] PCI_EXP_RXN,
output [7:0] LED,
input PCIE_REFCLK_P,
input PCIE_REFCLK_N,
input PCIE_RESET_N);
// Clocks, etc
wire user_lnk_up;
wire user_clk;
wire user_reset;
wire pcie_refclk;
wire pcie_reset_n;
wire riffa_5_clk;
wire riffa_10_clk;
wire riffa_25_clk;
wire riffa_50_clk;
wire riffa_75_clk;
wire riffa_100_clk;
wire riffa_125_clk;
wire riffa_150_clk;
wire riffa_175_clk;
wire riffa_200_clk;
wire riffa_225_clk;
wire riffa_250_clk;
// Interface: RQ (TXC)
wire s_axis_rq_tlast;
wire [C_PCI_DATA_WIDTH-1:0] s_axis_rq_tdata;
wire [`SIG_RQ_TUSER_W-1:0] s_axis_rq_tuser;
wire [(C_PCI_DATA_WIDTH/32)-1:0] s_axis_rq_tkeep;
wire s_axis_rq_tready;
wire s_axis_rq_tvalid;
// Interface: RC (RXC)
wire [C_PCI_DATA_WIDTH-1:0] m_axis_rc_tdata;
wire [`SIG_RC_TUSER_W-1:0] m_axis_rc_tuser;
wire m_axis_rc_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] m_axis_rc_tkeep;
wire m_axis_rc_tvalid;
wire m_axis_rc_tready;
// Interface: CQ (RXR)
wire [C_PCI_DATA_WIDTH-1:0] m_axis_cq_tdata;
wire [`SIG_CQ_TUSER_W-1:0] m_axis_cq_tuser;
wire m_axis_cq_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] m_axis_cq_tkeep;
wire m_axis_cq_tvalid;
wire m_axis_cq_tready;
// Interface: CC (TXC)
wire [C_PCI_DATA_WIDTH-1:0] s_axis_cc_tdata;
wire [`SIG_CC_TUSER_W-1:0] s_axis_cc_tuser;
wire s_axis_cc_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] s_axis_cc_tkeep;
wire s_axis_cc_tvalid;
wire s_axis_cc_tready;
// Configuration (CFG) Interface
wire [3:0] pcie_rq_seq_num;
wire pcie_rq_seq_num_vld;
wire [5:0] pcie_rq_tag;
wire pcie_rq_tag_vld;
wire pcie_cq_np_req;
wire [5:0] pcie_cq_np_req_count;
wire cfg_phy_link_down;
wire [3:0] cfg_negotiated_width; // CONFIG_LINK_WIDTH
wire [2:0] cfg_current_speed; // CONFIG_LINK_RATE
wire [2:0] cfg_max_payload; // CONFIG_MAX_PAYLOAD
wire [2:0] cfg_max_read_req; // CONFIG_MAX_READ_REQUEST
wire [7:0] cfg_function_status; // [2] = CONFIG_BUS_MASTER_ENABLE
wire [5:0] cfg_function_power_state; // Ignorable but not removable
wire [11:0] cfg_vf_status; // Ignorable but not removable
wire [17:0] cfg_vf_power_state; // Ignorable but not removable
wire [1:0] cfg_link_power_state; // Ignorable but not removable
// Error Reporting Interface
wire cfg_err_cor_out;
wire cfg_err_nonfatal_out;
wire cfg_err_fatal_out;
wire cfg_ltr_enable;
wire [5:0] cfg_ltssm_state;// TODO: Connect to LED's
wire [1:0] cfg_rcb_status;
wire [1:0] cfg_dpa_substate_change;
wire [1:0] cfg_obff_enable;
wire cfg_pl_status_change;
wire [1:0] cfg_tph_requester_enable;
wire [5:0] cfg_tph_st_mode;
wire [5:0] cfg_vf_tph_requester_enable;
wire [17:0] cfg_vf_tph_st_mode;
wire [7:0] cfg_fc_ph;
wire [11:0] cfg_fc_pd;
wire [7:0] cfg_fc_nph;
wire [11:0] cfg_fc_npd;
wire [7:0] cfg_fc_cplh;
wire [11:0] cfg_fc_cpld;
wire [2:0] cfg_fc_sel;
// Interrupt Interface Signals
wire [3:0] cfg_interrupt_int;
wire [1:0] cfg_interrupt_pending;
wire cfg_interrupt_sent;
wire [1:0] cfg_interrupt_msi_enable;
wire [5:0] cfg_interrupt_msi_vf_enable;
wire [5:0] cfg_interrupt_msi_mmenable;
wire cfg_interrupt_msi_mask_update;
wire [31:0] cfg_interrupt_msi_data;
wire [3:0] cfg_interrupt_msi_select;
wire [31:0] cfg_interrupt_msi_int;
wire [63:0] cfg_interrupt_msi_pending_status;
wire cfg_interrupt_msi_sent;
wire cfg_interrupt_msi_fail;
wire [2:0] cfg_interrupt_msi_attr;
wire cfg_interrupt_msi_tph_present;
wire [1:0] cfg_interrupt_msi_tph_type;
wire [8:0] cfg_interrupt_msi_tph_st_tag;
wire [2:0] cfg_interrupt_msi_function_number;
wire rst_out;
wire [C_NUM_CHNL-1:0] chnl_rx_clk;
wire [C_NUM_CHNL-1:0] chnl_rx;
wire [C_NUM_CHNL-1:0] chnl_rx_ack;
wire [C_NUM_CHNL-1:0] chnl_rx_last;
wire [(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0] chnl_rx_len;
wire [(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0] chnl_rx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_rx_data;
wire [C_NUM_CHNL-1:0] chnl_rx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_rx_data_ren;
wire [C_NUM_CHNL-1:0] chnl_tx_clk;
wire [C_NUM_CHNL-1:0] chnl_tx;
wire [C_NUM_CHNL-1:0] chnl_tx_ack;
wire [C_NUM_CHNL-1:0] chnl_tx_last;
wire [(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0] chnl_tx_len;
wire [(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0] chnl_tx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_tx_data;
wire [C_NUM_CHNL-1:0] chnl_tx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_tx_data_ren;
genvar chnl;
IBUF
#()
pci_reset_n_ibuf
(.O(pcie_reset_n),
.I(PCIE_RESET_N));
IBUFDS_GTE2
#()
refclk_ibuf
(.O(pcie_refclk),
.ODIV2(),
.I(PCIE_REFCLK_P),
.CEB(1'b0),
.IB(PCIE_REFCLK_N));
OBUF
#()
led_0_obuf
(.O(LED[0]),
.I(cfg_ltssm_state[0]));
OBUF
#()
led_1_obuf
(.O(LED[1]),
.I(cfg_ltssm_state[1]));
OBUF
#()
led_2_obuf
(.O(LED[2]),
.I(cfg_ltssm_state[2]));
OBUF
#()
led_3_obuf
(.O(LED[3]),
.I(cfg_ltssm_state[3]));
OBUF
#()
led_4_obuf
(.O(LED[4]),
.I(cfg_ltssm_state[4]));
OBUF
#()
led_5_obuf
(.O(LED[5]),
.I(cfg_ltssm_state[5]));
OBUF
#()
led_6_obuf
(.O(LED[6]),
.I(pcie_reset_n));
OBUF
#()
led_7_obuf
(.O(LED[7]),
.I(rst_out));
// Core Top Level Wrapper
PCIeGen1x8If64
#()
pcie3_7x_0_i
(//---------------------------------------------------------------------
// PCI Express (pci_exp) Interface
//---------------------------------------------------------------------
.pci_exp_txn ( PCI_EXP_TXN ),
.pci_exp_txp ( PCI_EXP_TXP ),
.pci_exp_rxn ( PCI_EXP_RXN ),
.pci_exp_rxp ( PCI_EXP_RXP ),
//---------------------------------------------------------------------
// AXI Interface
//---------------------------------------------------------------------
.user_clk ( user_clk ),
.user_reset ( user_reset ),
.user_lnk_up ( user_lnk_up ),
.user_app_rdy ( ),
.s_axis_rq_tlast ( s_axis_rq_tlast ),
.s_axis_rq_tdata ( s_axis_rq_tdata ),
.s_axis_rq_tuser ( s_axis_rq_tuser ),
.s_axis_rq_tkeep ( s_axis_rq_tkeep ),
.s_axis_rq_tready ( s_axis_rq_tready ),
.s_axis_rq_tvalid ( s_axis_rq_tvalid ),
.m_axis_rc_tdata ( m_axis_rc_tdata ),
.m_axis_rc_tuser ( m_axis_rc_tuser ),
.m_axis_rc_tlast ( m_axis_rc_tlast ),
.m_axis_rc_tkeep ( m_axis_rc_tkeep ),
.m_axis_rc_tvalid ( m_axis_rc_tvalid ),
.m_axis_rc_tready ( {22{m_axis_rc_tready}} ),
.m_axis_cq_tdata ( m_axis_cq_tdata ),
.m_axis_cq_tuser ( m_axis_cq_tuser ),
.m_axis_cq_tlast ( m_axis_cq_tlast ),
.m_axis_cq_tkeep ( m_axis_cq_tkeep ),
.m_axis_cq_tvalid ( m_axis_cq_tvalid ),
.m_axis_cq_tready ( {22{m_axis_cq_tready}} ),
.s_axis_cc_tdata ( s_axis_cc_tdata ),
.s_axis_cc_tuser ( s_axis_cc_tuser ),
.s_axis_cc_tlast ( s_axis_cc_tlast ),
.s_axis_cc_tkeep ( s_axis_cc_tkeep ),
.s_axis_cc_tvalid ( s_axis_cc_tvalid ),
.s_axis_cc_tready ( s_axis_cc_tready ),
//---------------------------------------------------------------------
// Configuration (CFG) Interface
//---------------------------------------------------------------------
.pcie_rq_seq_num ( pcie_rq_seq_num ),
.pcie_rq_seq_num_vld ( pcie_rq_seq_num_vld ),
.pcie_rq_tag ( pcie_rq_tag ),
.pcie_rq_tag_vld ( pcie_rq_tag_vld ),
.pcie_cq_np_req ( pcie_cq_np_req ),
.pcie_cq_np_req_count ( pcie_cq_np_req_count ),
.cfg_phy_link_down ( cfg_phy_link_down ),
.cfg_phy_link_status ( cfg_phy_link_status),
.cfg_negotiated_width ( cfg_negotiated_width ),
.cfg_current_speed ( cfg_current_speed ),
.cfg_max_payload ( cfg_max_payload ),
.cfg_max_read_req ( cfg_max_read_req ),
.cfg_function_status ( cfg_function_status ),
.cfg_function_power_state ( cfg_function_power_state ),
.cfg_vf_status ( cfg_vf_status ),
.cfg_vf_power_state ( cfg_vf_power_state ),
.cfg_link_power_state ( cfg_link_power_state ),
// Error Reporting Interface
.cfg_err_cor_out ( cfg_err_cor_out ),
.cfg_err_nonfatal_out ( cfg_err_nonfatal_out ),
.cfg_err_fatal_out ( cfg_err_fatal_out ),
.cfg_ltr_enable ( cfg_ltr_enable ),
.cfg_ltssm_state ( cfg_ltssm_state ),
.cfg_rcb_status ( cfg_rcb_status ),
.cfg_dpa_substate_change ( cfg_dpa_substate_change ),
.cfg_obff_enable ( cfg_obff_enable ),
.cfg_pl_status_change ( cfg_pl_status_change ),
.cfg_tph_requester_enable ( cfg_tph_requester_enable ),
.cfg_tph_st_mode ( cfg_tph_st_mode ),
.cfg_vf_tph_requester_enable ( cfg_vf_tph_requester_enable ),
.cfg_vf_tph_st_mode ( cfg_vf_tph_st_mode ),
.cfg_fc_ph ( cfg_fc_ph ),
.cfg_fc_pd ( cfg_fc_pd ),
.cfg_fc_nph ( cfg_fc_nph ),
.cfg_fc_npd ( cfg_fc_npd ),
.cfg_fc_cplh ( cfg_fc_cplh ),
.cfg_fc_cpld ( cfg_fc_cpld ),
.cfg_fc_sel ( cfg_fc_sel ),
//---------------------------------------------------------------------
// EP Only
//---------------------------------------------------------------------
// Interrupt Interface Signals
.cfg_interrupt_int ( cfg_interrupt_int ),
.cfg_interrupt_pending ( cfg_interrupt_pending ),
.cfg_interrupt_sent ( cfg_interrupt_sent ),
.cfg_interrupt_msi_enable ( cfg_interrupt_msi_enable ),
.cfg_interrupt_msi_vf_enable ( cfg_interrupt_msi_vf_enable ),
.cfg_interrupt_msi_mmenable ( cfg_interrupt_msi_mmenable ),
.cfg_interrupt_msi_mask_update ( cfg_interrupt_msi_mask_update ),
.cfg_interrupt_msi_data ( cfg_interrupt_msi_data ),
.cfg_interrupt_msi_select ( cfg_interrupt_msi_select ),
.cfg_interrupt_msi_int ( cfg_interrupt_msi_int ),
.cfg_interrupt_msi_pending_status ( cfg_interrupt_msi_pending_status ),
.cfg_interrupt_msi_sent ( cfg_interrupt_msi_sent ),
.cfg_interrupt_msi_fail ( cfg_interrupt_msi_fail ),
.cfg_interrupt_msi_attr ( cfg_interrupt_msi_attr ),
.cfg_interrupt_msi_tph_present ( cfg_interrupt_msi_tph_present ),
.cfg_interrupt_msi_tph_type ( cfg_interrupt_msi_tph_type ),
.cfg_interrupt_msi_tph_st_tag ( cfg_interrupt_msi_tph_st_tag ),
.cfg_interrupt_msi_function_number ( cfg_interrupt_msi_function_number ),
//---------------------------------------------------------------------
// System(SYS) Interface
//---------------------------------------------------------------------
.sys_clk (pcie_refclk),
.sys_reset (~pcie_reset_n));
riffa_wrapper_vc709
#(/*AUTOINSTPARAM*/
// Parameters
.C_LOG_NUM_TAGS (C_LOG_NUM_TAGS),
.C_NUM_CHNL (C_NUM_CHNL),
.C_PCI_DATA_WIDTH (C_PCI_DATA_WIDTH),
.C_MAX_PAYLOAD_BYTES (C_MAX_PAYLOAD_BYTES))
riffa
(// Outputs
.M_AXIS_CQ_TREADY (m_axis_cq_tready),
.M_AXIS_RC_TREADY (m_axis_rc_tready),
.S_AXIS_CC_TVALID (s_axis_cc_tvalid),
.S_AXIS_CC_TLAST (s_axis_cc_tlast),
.S_AXIS_CC_TDATA (s_axis_cc_tdata[C_PCI_DATA_WIDTH-1:0]),
.S_AXIS_CC_TKEEP (s_axis_cc_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.S_AXIS_CC_TUSER (s_axis_cc_tuser[`SIG_CC_TUSER_W-1:0]),
.S_AXIS_RQ_TVALID (s_axis_rq_tvalid),
.S_AXIS_RQ_TLAST (s_axis_rq_tlast),
.S_AXIS_RQ_TDATA (s_axis_rq_tdata[C_PCI_DATA_WIDTH-1:0]),
.S_AXIS_RQ_TKEEP (s_axis_rq_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.S_AXIS_RQ_TUSER (s_axis_rq_tuser[`SIG_RQ_TUSER_W-1:0]),
.USER_CLK (user_clk),
.USER_RESET (user_reset),
.CFG_INTERRUPT_INT (cfg_interrupt_int[3:0]),
.CFG_INTERRUPT_PENDING (cfg_interrupt_pending[1:0]),
.CFG_INTERRUPT_MSI_SELECT (cfg_interrupt_msi_select[3:0]),
.CFG_INTERRUPT_MSI_INT (cfg_interrupt_msi_int[31:0]),
.CFG_INTERRUPT_MSI_PENDING_STATUS(cfg_interrupt_msi_pending_status[63:0]),
.CFG_INTERRUPT_MSI_ATTR (cfg_interrupt_msi_attr[2:0]),
.CFG_INTERRUPT_MSI_TPH_PRESENT (cfg_interrupt_msi_tph_present),
.CFG_INTERRUPT_MSI_TPH_TYPE (cfg_interrupt_msi_tph_type[1:0]),
.CFG_INTERRUPT_MSI_TPH_ST_TAG (cfg_interrupt_msi_tph_st_tag[8:0]),
.CFG_INTERRUPT_MSI_FUNCTION_NUMBER(cfg_interrupt_msi_function_number[2:0]),
.CFG_FC_SEL (cfg_fc_sel[2:0]),
.PCIE_CQ_NP_REQ (pcie_cq_np_req),
.RST_OUT (rst_out),
.CHNL_RX (chnl_rx[C_NUM_CHNL-1:0]),
.CHNL_RX_LAST (chnl_rx_last[C_NUM_CHNL-1:0]),
.CHNL_RX_LEN (chnl_rx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_RX_OFF (chnl_rx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_RX_DATA (chnl_rx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_RX_DATA_VALID (chnl_rx_data_valid[C_NUM_CHNL-1:0]),
.CHNL_TX_ACK (chnl_tx_ack[C_NUM_CHNL-1:0]),
.CHNL_TX_DATA_REN (chnl_tx_data_ren[C_NUM_CHNL-1:0]),
// Inputs
.M_AXIS_CQ_TVALID (m_axis_cq_tvalid),
.M_AXIS_CQ_TLAST (m_axis_cq_tlast),
.M_AXIS_CQ_TDATA (m_axis_cq_tdata[C_PCI_DATA_WIDTH-1:0]),
.M_AXIS_CQ_TKEEP (m_axis_cq_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.M_AXIS_CQ_TUSER (m_axis_cq_tuser[`SIG_CQ_TUSER_W-1:0]),
.M_AXIS_RC_TVALID (m_axis_rc_tvalid),
.M_AXIS_RC_TLAST (m_axis_rc_tlast),
.M_AXIS_RC_TDATA (m_axis_rc_tdata[C_PCI_DATA_WIDTH-1:0]),
.M_AXIS_RC_TKEEP (m_axis_rc_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.M_AXIS_RC_TUSER (m_axis_rc_tuser[`SIG_RC_TUSER_W-1:0]),
.S_AXIS_CC_TREADY (s_axis_cc_tready),
.S_AXIS_RQ_TREADY (s_axis_rq_tready),
.CFG_INTERRUPT_MSI_ENABLE (cfg_interrupt_msi_enable[1:0]),
.CFG_INTERRUPT_MSI_MASK_UPDATE (cfg_interrupt_msi_mask_update),
.CFG_INTERRUPT_MSI_DATA (cfg_interrupt_msi_data[31:0]),
.CFG_INTERRUPT_MSI_SENT (cfg_interrupt_msi_sent),
.CFG_INTERRUPT_MSI_FAIL (cfg_interrupt_msi_fail),
.CFG_FC_CPLH (cfg_fc_cplh[7:0]),
.CFG_FC_CPLD (cfg_fc_cpld[11:0]),
.CFG_NEGOTIATED_WIDTH (cfg_negotiated_width[3:0]),
.CFG_CURRENT_SPEED (cfg_current_speed[2:0]),
.CFG_MAX_PAYLOAD (cfg_max_payload[2:0]),
.CFG_MAX_READ_REQ (cfg_max_read_req[2:0]),
.CFG_FUNCTION_STATUS (cfg_function_status[7:0]),
.CFG_RCB_STATUS (cfg_rcb_status[1:0]),
.CHNL_RX_CLK (chnl_rx_clk[C_NUM_CHNL-1:0]),
.CHNL_RX_ACK (chnl_rx_ack[C_NUM_CHNL-1:0]),
.CHNL_RX_DATA_REN (chnl_rx_data_ren[C_NUM_CHNL-1:0]),
.CHNL_TX_CLK (chnl_tx_clk[C_NUM_CHNL-1:0]),
.CHNL_TX (chnl_tx[C_NUM_CHNL-1:0]),
.CHNL_TX_LAST (chnl_tx_last[C_NUM_CHNL-1:0]),
.CHNL_TX_LEN (chnl_tx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_TX_OFF (chnl_tx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_TX_DATA (chnl_tx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_TX_DATA_VALID (chnl_tx_data_valid[C_NUM_CHNL-1:0]));
clk_250MIn_1
clkgen
(.user_clk(user_clk),
.riffa_5_clk(riffa_5_clk),
.riffa_10_clk(riffa_10_clk),
.riffa_25_clk(riffa_25_clk),
.riffa_50_clk(riffa_50_clk),
.riffa_75_clk(riffa_75_clk),
.riffa_100_clk(riffa_100_clk));
clk_250MIn_2
clkgen_2
(.user_clk(user_clk),
.riffa_125_clk(riffa_125_clk),
.riffa_150_clk(riffa_150_clk),
.riffa_175_clk(riffa_175_clk),
.riffa_200_clk(riffa_200_clk),
.riffa_225_clk(riffa_225_clk),
.riffa_250_clk(riffa_250_clk));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_5mhz
(.CLK(riffa_5_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[0]),
.CHNL_RX(chnl_rx[0]),
.CHNL_RX_ACK(chnl_rx_ack[0]),
.CHNL_RX_LAST(chnl_rx_last[0]),
.CHNL_RX_LEN(chnl_rx_len[32*0 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*0 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[0]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[0]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[0]),
.CHNL_TX(chnl_tx[0]),
.CHNL_TX_ACK(chnl_tx_ack[0]),
.CHNL_TX_LAST(chnl_tx_last[0]),
.CHNL_TX_LEN(chnl_tx_len[32*0 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*0 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[0]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[0]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_10mhz
(.CLK(riffa_10_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[1]),
.CHNL_RX(chnl_rx[1]),
.CHNL_RX_ACK(chnl_rx_ack[1]),
.CHNL_RX_LAST(chnl_rx_last[1]),
.CHNL_RX_LEN(chnl_rx_len[32*1 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*1 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[1]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[1]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[1]),
.CHNL_TX(chnl_tx[1]),
.CHNL_TX_ACK(chnl_tx_ack[1]),
.CHNL_TX_LAST(chnl_tx_last[1]),
.CHNL_TX_LEN(chnl_tx_len[32*1 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*1 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[1]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[1]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_25mhz
(.CLK(riffa_25_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[2]),
.CHNL_RX(chnl_rx[2]),
.CHNL_RX_ACK(chnl_rx_ack[2]),
.CHNL_RX_LAST(chnl_rx_last[2]),
.CHNL_RX_LEN(chnl_rx_len[32*2 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*2 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[2]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[2]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[2]),
.CHNL_TX(chnl_tx[2]),
.CHNL_TX_ACK(chnl_tx_ack[2]),
.CHNL_TX_LAST(chnl_tx_last[2]),
.CHNL_TX_LEN(chnl_tx_len[32*2 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*2 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[2]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[2]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_50mhz
(.CLK(riffa_50_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[3]),
.CHNL_RX(chnl_rx[3]),
.CHNL_RX_ACK(chnl_rx_ack[3]),
.CHNL_RX_LAST(chnl_rx_last[3]),
.CHNL_RX_LEN(chnl_rx_len[32*3 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*3 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[3]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[3]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[3]),
.CHNL_TX(chnl_tx[3]),
.CHNL_TX_ACK(chnl_tx_ack[3]),
.CHNL_TX_LAST(chnl_tx_last[3]),
.CHNL_TX_LEN(chnl_tx_len[32*3 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*3 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[3]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[3]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_75mhz
(.CLK(riffa_75_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[4]),
.CHNL_RX(chnl_rx[4]),
.CHNL_RX_ACK(chnl_rx_ack[4]),
.CHNL_RX_LAST(chnl_rx_last[4]),
.CHNL_RX_LEN(chnl_rx_len[32*4 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*4 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[4]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[4]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[4]),
.CHNL_TX(chnl_tx[4]),
.CHNL_TX_ACK(chnl_tx_ack[4]),
.CHNL_TX_LAST(chnl_tx_last[4]),
.CHNL_TX_LEN(chnl_tx_len[32*4 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*4 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[4]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[4]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_100mhz
(.CLK(riffa_100_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[5]),
.CHNL_RX(chnl_rx[5]),
.CHNL_RX_ACK(chnl_rx_ack[5]),
.CHNL_RX_LAST(chnl_rx_last[5]),
.CHNL_RX_LEN(chnl_rx_len[32*5 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*5 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[5]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[5]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[5]),
.CHNL_TX(chnl_tx[5]),
.CHNL_TX_ACK(chnl_tx_ack[5]),
.CHNL_TX_LAST(chnl_tx_last[5]),
.CHNL_TX_LEN(chnl_tx_len[32*5 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*5 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[5]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[5]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_125mhz
(.CLK(riffa_125_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[6]),
.CHNL_RX(chnl_rx[6]),
.CHNL_RX_ACK(chnl_rx_ack[6]),
.CHNL_RX_LAST(chnl_rx_last[6]),
.CHNL_RX_LEN(chnl_rx_len[32*6 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*6 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[6]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[6]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[6]),
.CHNL_TX(chnl_tx[6]),
.CHNL_TX_ACK(chnl_tx_ack[6]),
.CHNL_TX_LAST(chnl_tx_last[6]),
.CHNL_TX_LEN(chnl_tx_len[32*6 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*6 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[6]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[6]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_150mhz
(.CLK(riffa_150_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[7]),
.CHNL_RX(chnl_rx[7]),
.CHNL_RX_ACK(chnl_rx_ack[7]),
.CHNL_RX_LAST(chnl_rx_last[7]),
.CHNL_RX_LEN(chnl_rx_len[32*7 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*7 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[7]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[7]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[7]),
.CHNL_TX(chnl_tx[7]),
.CHNL_TX_ACK(chnl_tx_ack[7]),
.CHNL_TX_LAST(chnl_tx_last[7]),
.CHNL_TX_LEN(chnl_tx_len[32*7 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*7 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[7]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[7]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_175mhz
(.CLK(riffa_175_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[8]),
.CHNL_RX(chnl_rx[8]),
.CHNL_RX_ACK(chnl_rx_ack[8]),
.CHNL_RX_LAST(chnl_rx_last[8]),
.CHNL_RX_LEN(chnl_rx_len[32*8 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*8 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[8]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[8]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[8]),
.CHNL_TX(chnl_tx[8]),
.CHNL_TX_ACK(chnl_tx_ack[8]),
.CHNL_TX_LAST(chnl_tx_last[8]),
.CHNL_TX_LEN(chnl_tx_len[32*8 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*8 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[8]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[8]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_200mhz
(.CLK(riffa_200_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[9]),
.CHNL_RX(chnl_rx[9]),
.CHNL_RX_ACK(chnl_rx_ack[9]),
.CHNL_RX_LAST(chnl_rx_last[9]),
.CHNL_RX_LEN(chnl_rx_len[32*9 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*9 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[9]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[9]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[9]),
.CHNL_TX(chnl_tx[9]),
.CHNL_TX_ACK(chnl_tx_ack[9]),
.CHNL_TX_LAST(chnl_tx_last[9]),
.CHNL_TX_LEN(chnl_tx_len[32*9 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*9 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[9]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[9]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_225mhz
(.CLK(riffa_225_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[10]),
.CHNL_RX(chnl_rx[10]),
.CHNL_RX_ACK(chnl_rx_ack[10]),
.CHNL_RX_LAST(chnl_rx_last[10]),
.CHNL_RX_LEN(chnl_rx_len[32*10 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*10 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[10]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[10]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[10]),
.CHNL_TX(chnl_tx[10]),
.CHNL_TX_ACK(chnl_tx_ack[10]),
.CHNL_TX_LAST(chnl_tx_last[10]),
.CHNL_TX_LEN(chnl_tx_len[32*10 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*10 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[10]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[10]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_250mhz
(.CLK(riffa_250_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[11]),
.CHNL_RX(chnl_rx[11]),
.CHNL_RX_ACK(chnl_rx_ack[11]),
.CHNL_RX_LAST(chnl_rx_last[11]),
.CHNL_RX_LEN(chnl_rx_len[32*11 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*11 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[11]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[11]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[11]),
.CHNL_TX(chnl_tx[11]),
.CHNL_TX_ACK(chnl_tx_ack[11]),
.CHNL_TX_LAST(chnl_tx_last[11]),
.CHNL_TX_LEN(chnl_tx_len[32*11 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*11 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[11]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[11]));
endmodule
// Local Variables:
// verilog-library-directories:("." "../../../engine/" "ultrascale/rx/" "ultrascale/tx/" "classic/rx/" "classic/tx/" "../../../riffa/")
// End:

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fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/ip/PCIeGen1x8If64.xci Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:instanceName>PCIeGen1x8If64</spirit:instanceName>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RQ_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_CTL_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_EXT_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_FC_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_MGMT_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_STATUS_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_TX_MSG_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.COMPLETION_SPACE">16KB</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DATA_WIDTH">64</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_CH_GT_DRP">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_PIPE_INTERFACE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_STARTUP_PRIMITIVE">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_EXT_GT_COMMON">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_FAST_CONFIG">NONE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_AER_CAP_ECRC_GEN_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_AER_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_ARI_CAP_NEXT_FUNC">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR0_APERTURE_SIZE">0b00011</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR1_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR3_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_AER_CAP_ECRC_GEN_CAPABLE">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RCV_MSG_IF">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_LEGACY_MODE_ENABLE">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TRANSCEIVER_CTRL_STATUS_PORTS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TX_FC_IF">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_ST_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y0_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y1_ucf">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y2_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y3_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.pcie_blk_locn">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.silicon_revision">Production</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.xlnx_ref_board">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_ENABLEMENT.xlnx_ref_board">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXISTEN_IF_RC_STRADDLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">PCIeGen1x8If64</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_AER_CAP_ECRC_CHECK_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_AER_CAP_ECRC_GEN_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_CLASS_CODE">058000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEVICE_ID">7018</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_OBFF_SUPPORT">00_Not_Supported</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_INTERRUPT_PIN">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_LINK_STATUS_SLOT_CLOCK_CONFIG">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D3HOT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_SUPP_D1_STATE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_REVISION_ID">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SRIOV_CAP_INITIAL_VF">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SRIOV_FIRST_VF_OFFSET">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SRIOV_FUNC_DEP_LINK">0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SRIOV_SUPPORTED_PAGE_SIZE">00000553</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SRIOV_VF_DEVICE_ID">0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SUBSYSTEM_ID">0007</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SUBSYSTEM_VENDOR_ID">10EE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_Use_Class_Code_Lookup_Assistant">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_AER_CAP_ECRC_CHECK_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_AER_CAP_ECRC_GEN_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_CLASS_CODE">058000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_DEVICE_ID">7011</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_INTERRUPT_PIN">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_REVISION_ID">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_CAP_INITIAL_VF">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_CAP_VER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_FIRST_VF_OFFSET">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_FUNC_DEP_LINK">0001</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_SUPPORTED_PAGE_SIZE">00000553</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SRIOV_VF_DEVICE_ID">0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_SUBSYSTEM_ID">0007</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_Use_Class_Code_Lookup_Assistant">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PL_LINK_CAP_MAX_LINK_SPEED">2.5_GT/s</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PL_LINK_CAP_MAX_LINK_WIDTH">X8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REF_CLK_FREQ">100_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SRIOV_CAP_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SRIOV_CAP_ENABLE_EXT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TL_PF_ENABLE_REG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_BOARD_FLOW">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.alignment_mode">DWORD_Aligned</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.aspm_support">No_ASPM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_freq">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_client_tag">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_msg_route">2FFFF</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_rx_msg_intfc">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_width">64_bit</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ctl_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ext_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_fc_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_mgmt_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_status_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_tx_msg_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.device_port_type">PCI_Express_Endpoint_device</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_ch_gt_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_clk">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_gt_common">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_pipe_interface">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_startup">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_msi_per_vec_masking">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_pcie_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_powerdown">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_transceiver_status_ports">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ext_pcie_cfg_space_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.extended_tag_field">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y1">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.mode_selection">Advanced</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pcie_blk_locn">X0Y1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.per_func_status_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.perf_level">Extreme</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.performance">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_scale">Kilobytes</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_base_class_menu">Simple_communication_controllers</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_base">05</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_sub">80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dev_cap_max_payload">512_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ltr_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msi_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msix_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_pb_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_cap_ver">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sub_class_interface_menu">Generic_XT_compatible_serial_controller</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_tphr_enable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_vc_cap_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_base_class_menu">Simple_communication_controllers</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_base">05</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_sub">80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dev_cap_max_payload">512_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msi_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msix_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_pb_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_scale">Kilobytes</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_scale">Kilobytes</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_scale">Kilobytes</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_type">N/A</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_tphr_enable">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.silicon_rev">Production</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tl_pf0_enable_reg">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.xlnx_ref_board">VC709</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD">xilinx.com:vc709:part0:1.5</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
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562
fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/ip/clk_250MIn_1/clk_250MIn_1.xci Normal file
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_OUT_FREQ">5.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_OUT_FREQ">5</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_OUT_FREQ">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_OUT_FREQ">10</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_OUT_FREQ">24.800</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_OUT_FREQ">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_OUT_FREQ">51.667</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_OUT_FREQ">50</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_OUT_FREQ">77.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_OUT_FREQ">75</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_OUT_FREQ">103.333</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_USED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUTPHY_MODE">VCO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT1_PORT">riffa_5_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT2_PORT">riffa_10_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT3_PORT">riffa_25_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT4_PORT">riffa_50_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT5_PORT">riffa_75_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT6_PORT">riffa_100_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLOCK_MGR_TYPE">NA</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_CLKOUTPHY">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CDDC">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW0">Input Clock Freq (MHz) Input Jitter (UI)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW1">__primary_____________250____________0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW2">no_secondary_input_clock </spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INTERFACE_SELECTION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_MULT_F">62.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DIVIDE_F">124.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DIVIDE">62</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DIVIDE">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DIVIDE">12</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_CASCADE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DIVIDE">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DIVIDE">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLOCK_HOLD">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_DIVCLK_DIVIDE">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_STARTUP_WAIT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0A"> Output Output Phase Duty Cycle Pk-to-Pk Phase</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0B"> Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW1">CLK_OUT1_____5.000______0.000______50.0______943.594____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW2">CLK_OUT2____10.000______0.000______50.0______855.836____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW3">CLK_OUT3____24.800______0.000______50.0______752.191____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW4">CLK_OUT4____51.667______0.000______50.0______678.319____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW5">CLK_OUT5____77.500______0.000______50.0______641.055____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW6">CLK_OUT6___103.333______0.000______50.0______615.875____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW7">no_CLK_OUT7_output</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_MMCM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_PLL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_MULT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKIN_PERIOD">1.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLK_FEEDBACK">CLKFBOUT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_COMPENSATION">SYSTEM_SYNCHRONOUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_NOTES">No notes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_REF_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_POWER_DOWN_PORT">power_down</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMARY_PORT">user_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMITIVE">MMCM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMTYPE_SEL">AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSCLK_PORT">psclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSDONE_PORT">psdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSEN_PORT">psen</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSINCDEC_PORT">psincdec</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_LOW">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_PORT">clk_rst</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_PORT">clk_in2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MODE">CENTER_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_PERIOD">4000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_TIME">0.004</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_STATUS_PORT">STATUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">11</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKFB_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT1_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT2_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT3_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT4_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLK_VALID">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLOCK_SEQUENCING">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_PHASE_SHIFT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_RECONFIG">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FAST_SIMULATION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREEZE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREQ_SYNTH">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_SWITCHOVER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_LOCKED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MAX_I_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_O_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_POWER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_PHASE_ALIGNMENT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_POWER_DOWN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_RESET">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SAFE_CLOCK_STARTUP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SPREAD_SPECTRUM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_STATUS">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_component_name">clk_250MIn_1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CALC_DONE">empty</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCDONE_PORT">cddcdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCREQ_PORT">cddcreq</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_N_PORT">clkfb_in_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_PORT">clkfb_in</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_JITTER">943.594</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_OUT_FREQ">5</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_JITTER">855.836</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_OUT_FREQ">10</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_JITTER">752.191</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_OUT_FREQ">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_JITTER">678.319</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_OUT_FREQ">50</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_JITTER">641.055</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_OUT_FREQ">75</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_JITTER">615.875</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_JITTER">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_PHASE_ERROR">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_USED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUTPHY_REQUESTED_FREQ">600.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_PORT">riffa_5_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_PORT">riffa_10_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_PORT">riffa_25_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_PORT">riffa_50_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_PORT">riffa_75_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_PORT">riffa_100_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_MGR_TYPE">auto</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">clk_250MIn_1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CDDC">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CLKOUTPHY">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_MODE">frequency</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERFACE_SELECTION">Enable_AXI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_JITTER_UNITS">Units_UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_OPTIONS">UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_MULT_F">62.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DIVIDE_F">124.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DIVIDE">62</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DIVIDE">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DIVIDE">12</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_CASCADE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DIVIDE">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DIVIDE">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLOCK_HOLD">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_DIVCLK_DIVIDE">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_STARTUP_WAIT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_MMCM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_PLL">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PHASE_DUTY_CONFIG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_MULT">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKIN_PERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
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fpga/xilinx/vc709/VC709_Gen1x8If64_CLK/ip/clk_250MIn_2/clk_250MIn_2.xci Normal file
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_USED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUTPHY_MODE">VCO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT1_PORT">riffa_125_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT2_PORT">riffa_150_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT3_PORT">riffa_175_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT4_PORT">riffa_200_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT5_PORT">riffa_225_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT6_PORT">riffa_250_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLOCK_MGR_TYPE">NA</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_CLKOUTPHY">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CDDC">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW0">Input Clock Freq (MHz) Input Jitter (UI)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW1">__primary_____________250____________0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW2">no_secondary_input_clock </spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INTERFACE_SELECTION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_MULT_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DIVIDE_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_CASCADE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLOCK_HOLD">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_STARTUP_WAIT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0A"> Output Output Phase Duty Cycle Pk-to-Pk Phase</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0B"> Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW1">CLK_OUT1___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW2">CLK_OUT2___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW3">CLK_OUT3___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW4">CLK_OUT4___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW5">CLK_OUT5___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW6">CLK_OUT6___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW7">no_CLK_OUT7_output</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_MMCM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_PLL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_MULT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKIN_PERIOD">1.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLK_FEEDBACK">CLKFBOUT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_COMPENSATION">SYSTEM_SYNCHRONOUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_NOTES">No notes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_REF_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_POWER_DOWN_PORT">power_down</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMARY_PORT">user_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMITIVE">MMCM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMTYPE_SEL">AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSCLK_PORT">psclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSDONE_PORT">psdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSEN_PORT">psen</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSINCDEC_PORT">psincdec</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_LOW">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_PORT">clk_rst</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_PORT">clk_in2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MODE">CENTER_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_PERIOD">4000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_TIME">0.004</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_STATUS_PORT">STATUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">11</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKFB_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT1_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT2_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT3_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT4_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLK_VALID">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLOCK_SEQUENCING">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_PHASE_SHIFT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_RECONFIG">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FAST_SIMULATION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREEZE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREQ_SYNTH">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_SWITCHOVER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_LOCKED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MAX_I_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_O_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_POWER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_PHASE_ALIGNMENT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_POWER_DOWN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_RESET">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SAFE_CLOCK_STARTUP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SPREAD_SPECTRUM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_STATUS">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_component_name">clk_250MIn_2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CALC_DONE">empty</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCDONE_PORT">cddcdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCREQ_PORT">cddcreq</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_N_PORT">clkfb_in_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_PORT">clkfb_in</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_JITTER">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_PHASE_ERROR">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_USED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUTPHY_REQUESTED_FREQ">600.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_PORT">riffa_125_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_PORT">riffa_150_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_PORT">riffa_175_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_PORT">riffa_200_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_PORT">riffa_225_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_PORT">riffa_250_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_MGR_TYPE">auto</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">clk_250MIn_2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CDDC">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CLKOUTPHY">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_MODE">frequency</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERFACE_SELECTION">Enable_AXI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_JITTER_UNITS">Units_UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_OPTIONS">UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_MULT_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DIVIDE_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_CASCADE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLOCK_HOLD">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_STARTUP_WAIT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_MMCM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_PLL">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PHASE_DUTY_CONFIG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_MULT">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKIN_PERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT3_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT4_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT5_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLK_FEEDBACK">CLKFBOUT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_COMPENSATION">SYSTEM_SYNCHRONOUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_REF_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.POWER_DOWN_PORT">power_down</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIMARY_PORT">user_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIMITIVE">MMCM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIMTYPE_SEL">mmcm_adv</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIM_IN_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIM_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIM_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRIM_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PSCLK_PORT">psclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PSDONE_PORT">psdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PSEN_PORT">psen</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PSINCDEC_PORT">psincdec</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RELATIVE_INCLK">REL_PRIMARY</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_PORT">clk_rst</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_TYPE">ACTIVE_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SECONDARY_IN_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SECONDARY_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SECONDARY_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SECONDARY_PORT">clk_in2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SECONDARY_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SS_MODE">CENTER_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SS_MOD_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SS_MOD_TIME">0.004</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.STATUS_PORT">STATUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SUMMARY_STRINGS">empty</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_BOARD_FLOW">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_CLKFB_STOPPED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_CLK_VALID">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_CLOCK_SEQUENCING">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_DYN_PHASE_SHIFT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_DYN_RECONFIG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_FREEZE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_FREQ_SYNTH">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_INCLK_STOPPED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_INCLK_SWITCHOVER">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_LOCKED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_MAX_I_JITTER">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_MIN_O_JITTER">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_MIN_POWER">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_PHASE_ALIGNMENT">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_POWER_DOWN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_RESET">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_SAFE_CLOCK_STARTUP">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_SPREAD_SPECTRUM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_STATUS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">virtex7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD">xilinx.com:vc709:part0:1.5</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7vx690t</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">ffg1761</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
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</File>
<File Path="$PPRDIR/../../riffa_wrapper_vc709.v">
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</File>
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</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="VC709_Gen1x8If64"/>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
</FileSet>
<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
<Filter Type="Constrs"/>
<File Path="$PPRDIR/../constr/VC709_Gen1x8If64.xdc">
<FileInfo>
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</FileInfo>
</File>
<Config>
<Option Name="TargetConstrsFile" Val="$PPRDIR/../constr/VC709_Gen1x8If64.xdc"/>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1">
<Filter Type="Srcs"/>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="VC709_Gen1x8If64"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="TopAutoSet" Val="TRUE"/>
<Option Name="SimMode" Val="post-implementation"/>
<Option Name="SrcSet" Val="sources_1"/>
</Config>
</FileSet>
<FileSet Name="PCIeGen1x8If64" Type="BlockSrcs" RelSrcDir="$PSRCDIR/PCIeGen1x8If64">
<File Path="$PPRDIR/../ip/PCIeGen1x8If64.xci">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="PCIeGen1x8If64"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="clk_250MIn_2" Type="BlockSrcs" RelSrcDir="$PSRCDIR/clk_250MIn_2">
<File Path="$PPRDIR/../ip/clk_250MIn_2/clk_250MIn_2.xci">
<FileInfo>
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</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="clk_250MIn_2"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="clk_250MIn_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/clk_250MIn_1">
<File Path="$PPRDIR/../ip/clk_250MIn_1/clk_250MIn_1.xci">
<FileInfo>
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<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="clk_250MIn_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
</FileSets>
<Simulators>
<Simulator Name="XSim">
<Option Name="Description" Val="Vivado Simulator"/>
<Option Name="CompiledLib" Val="0"/>
</Simulator>
<Simulator Name="ModelSim">
<Option Name="Description" Val="ModelSim Simulator"/>
</Simulator>
<Simulator Name="Questa">
<Option Name="Description" Val="Questa Advanced Simulator"/>
</Simulator>
<Simulator Name="IES">
<Option Name="Description" Val="Incisive Enterprise Simulator (IES)"/>
</Simulator>
<Simulator Name="VCS">
<Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
</Simulator>
<Simulator Name="Riviera">
<Option Name="Description" Val="Riviera-PRO Simulator"/>
</Simulator>
</Simulators>
<Runs Version="1" Minor="10">
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7vx690tffg1761-2" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2014"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="PCIeGen1x8If64_synth_1" Type="Ft3:Synth" SrcSet="PCIeGen1x8If64" Part="xc7vx690tffg1761-2" ConstrsSet="PCIeGen1x8If64" Description="Vivado Synthesis Defaults" Dir="$PRUNDIR/PCIeGen1x8If64_synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2015"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="clk_250MIn_2_synth_1" Type="Ft3:Synth" SrcSet="clk_250MIn_2" Part="xc7vx690tffg1761-2" ConstrsSet="clk_250MIn_2" Description="Vivado Synthesis Defaults" Dir="$PRUNDIR/clk_250MIn_2_synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2015"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="clk_250MIn_1_synth_1" Type="Ft3:Synth" SrcSet="clk_250MIn_1" Part="xc7vx690tffg1761-2" ConstrsSet="clk_250MIn_1" Description="Vivado Synthesis Defaults" Dir="$PRUNDIR/clk_250MIn_1_synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2015"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7vx690tffg1761-2" ConstrsSet="constrs_1" Description="Vivado Implementation Defaults" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2014"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="PCIeGen1x8If64_impl_1" Type="Ft2:EntireDesign" Part="xc7vx690tffg1761-2" ConstrsSet="PCIeGen1x8If64" Description="Vivado Implementation Defaults" SynthRun="PCIeGen1x8If64_synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
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</Strategy>
</Run>
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<Strategy Version="1" Minor="2">
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<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
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<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
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</Strategy>
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<Strategy Version="1" Minor="2">
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</Run>
</Runs>
</Project>

62
fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/Makefile Normal file
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@ -0,0 +1,62 @@
# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#-----------------------------------------------------------------------
# Filename: Makefile
# Version: 1.0
# Description: Project-level makefile for building an example project
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------
# This make file expects the following variables to be set:
# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory.
# BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to
# BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory
WIDTH=128
TYPE=ultrascale
CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
PROJECT=$(shell basename $(CURRENT_PATH))
ifndef RIFFA_HDL_PATH
RIFFA_HDL_PATH:=../../../riffa_hdl
endif
ifndef BOARD_PATH
BOARD_PATH:=..
endif
ifndef JOBS
JOBS=1
endif
include $(RIFFA_HDL_PATH)/riffa.mk
include $(BOARD_PATH)/board.mk
PROJECT_IP+=ip/PCIeGen2x8If128.xci

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fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/bit/VC709_Gen2x8If128.bit Normal file
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152
fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/constr/VC709_Gen2x8If128.xdc Normal file
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# ----------------------------------------------------------------------
# Copyright (c) 2016, The Regents of the University of California All
# rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above
# copyright notice, this list of conditions and the following
# disclaimer in the documentation and/or other materials provided
# with the distribution.
#
# * Neither the name of The Regents of the University of California
# nor the names of its contributors may be used to endorse or
# promote products derived from this software without specific
# prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
# DAMAGE.
# ----------------------------------------------------------------------
#----------------------------------------------------------------------------
# Filename: VC709_Top.xdc
# Version: 1.00.a
# Verilog Standard: Verilog-2001
# Description: Xilinx Design Constraints for the VC709 board.
# These constrain the PCIE_REFCLK, its DSBUF, LED Pins, and PCIE_RESET_N pin
#
# Author: Dustin Richmond (@darichmond)
#-----------------------------------------------------------------------------
#
#########################################################################################################################
# User Constraints
#########################################################################################################################
###############################################################################
# User Time Names / User Time Groups / Time Specs
###############################################################################
###############################################################################
# User Physical Constraints
###############################################################################
#
# LED Status Indicators for Example Design.
# LED 0-2 should be all ON if link is up and functioning correctly
# LED 3 should be blinking if user application is receiving valid clock
#
#System Reset, User Reset, User Link Up, User Clk Heartbeat
set_property PACKAGE_PIN AM39 [get_ports {LED[0]}]
set_property PACKAGE_PIN AN39 [get_ports {LED[1]}]
set_property PACKAGE_PIN AR37 [get_ports {LED[2]}]
set_property PACKAGE_PIN AT37 [get_ports {LED[3]}]
set_property PACKAGE_PIN AR35 [get_ports {LED[4]}]
set_property PACKAGE_PIN AP41 [get_ports {LED[5]}]
set_property PACKAGE_PIN AP42 [get_ports {LED[6]}]
set_property PACKAGE_PIN AU39 [get_ports {LED[7]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[1]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[2]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[3]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[4]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[5]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[6]}]
set_property IOSTANDARD LVCMOS18 [get_ports {LED[7]}]
set_false_path -to [get_ports -filter NAME=~LED*]
#########################################################################################################################
# End User Constraints
#########################################################################################################################
#
#
#
#########################################################################################################################
# PCIE Core Constraints
#########################################################################################################################
#
# SYS reset (input) signal. The sys_reset_n signal should be
# obtained from the PCI Express interface if possible. For
# slot based form factors, a system reset signal is usually
# present on the connector. For cable based form factors, a
# system reset signal may not be available. In this case, the
# system reset signal must be generated locally by some form of
# supervisory circuit. You may change the IOSTANDARD and LOC
# to suit your requirements and VCCO voltage banking rules.
# Some 7 series devices do not have 3.3 V I/Os available.
# Therefore the appropriate level shift is required to operate
# with these devices that contain only 1.8 V banks.
#
set_property PACKAGE_PIN AV35 [get_ports PCIE_RESET_N]
set_property IOSTANDARD LVCMOS18 [get_ports PCIE_RESET_N]
set_property PULLUP true [get_ports PCIE_RESET_N]
#
#
# SYS clock 100 MHz (input) signal. The sys_clk_p and sys_clk_n
# signals are the PCI Express reference clock. Virtex-7 GT
# Transceiver architecture requires the use of a dedicated clock
# resources (FPGA input pins) associated with each GT Transceiver.
# To use these pins an IBUFDS primitive (refclk_ibuf) is
# instantiated in user's design.
# Please refer to the Virtex-7 GT Transceiver User Guide
# (UG) for guidelines regarding clock resource selection.
#
set_property LOC IBUFDS_GTE2_X1Y11 [get_cells refclk_ibuf]
###############################################################################
# Timing Constraints
###############################################################################
create_clock -period 10.000 -name pcie_refclk [get_pins refclk_ibuf/O]
###############################################################################
# Physical Constraints
###############################################################################
set_false_path -from [get_ports PCIE_RESET_N]
###############################################################################
# End
###############################################################################
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]] -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT0]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT2]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT3]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT4]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen/inst/mmcm_adv_inst/CLKOUT5]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT0]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT1]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT2]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT3]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT4]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]
set_clock_groups -asynchronous -group [get_clocks -of_objects [get_pins clkgen_2/inst/mmcm_adv_inst/CLKOUT5]] -group [get_clocks -of_objects [get_pins pcie3_7x_0_i/inst/gt_top_i/pipe_wrapper_i/pipe_clock_int.pipe_clock_i/mmcm_i/CLKOUT2]]

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// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following
// disclaimer in the documentation and/or other materials provided
// with the distribution.
//
// * Neither the name of The Regents of the University of California
// nor the names of its contributors may be used to endorse or
// promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
// UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
// OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
// ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
// TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
// USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
// DAMAGE.
// ----------------------------------------------------------------------
//----------------------------------------------------------------------------
// Filename: VC709_Gen2x8If128.v
// Version: 1.00.a
// Verilog Standard: Verilog-2001
// Description: Top level module for RIFFA 2.2 reference design for the
// the Xilinx VC709 Development Board.
// Author: Dustin Richmond (@darichmond)
//-----------------------------------------------------------------------------
`include "functions.vh"
`include "riffa.vh"
`include "ultrascale.vh"
`timescale 1ps / 1ps
module VC709_Gen2x8If128
#(// Number of RIFFA Channels
parameter C_NUM_CHNL = 12,
// Number of PCIe Lanes
parameter C_NUM_LANES = 8,
// Settings from Vivado IP Generator
parameter C_PCI_DATA_WIDTH = 128,
parameter C_MAX_PAYLOAD_BYTES = 256,
parameter C_LOG_NUM_TAGS = 6
)
(output [(C_NUM_LANES - 1) : 0] PCI_EXP_TXP,
output [(C_NUM_LANES - 1) : 0] PCI_EXP_TXN,
input [(C_NUM_LANES - 1) : 0] PCI_EXP_RXP,
input [(C_NUM_LANES - 1) : 0] PCI_EXP_RXN,
output [7:0] LED,
input PCIE_REFCLK_P,
input PCIE_REFCLK_N,
input PCIE_RESET_N
);
// Clocks, etc
wire user_lnk_up;
wire user_clk;
wire user_reset;
wire pcie_refclk;
wire pcie_reset_n;
wire riffa_5_clk;
wire riffa_10_clk;
wire riffa_25_clk;
wire riffa_50_clk;
wire riffa_75_clk;
wire riffa_100_clk;
wire riffa_125_clk;
wire riffa_150_clk;
wire riffa_175_clk;
wire riffa_200_clk;
wire riffa_225_clk;
wire riffa_250_clk;
// Interface: RQ (TXC)
wire s_axis_rq_tlast;
wire [C_PCI_DATA_WIDTH-1:0] s_axis_rq_tdata;
wire [`SIG_RQ_TUSER_W-1:0] s_axis_rq_tuser;
wire [(C_PCI_DATA_WIDTH/32)-1:0] s_axis_rq_tkeep;
wire s_axis_rq_tready;
wire s_axis_rq_tvalid;
// Interface: RC (RXC)
wire [C_PCI_DATA_WIDTH-1:0] m_axis_rc_tdata;
wire [`SIG_RC_TUSER_W-1:0] m_axis_rc_tuser;
wire m_axis_rc_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] m_axis_rc_tkeep;
wire m_axis_rc_tvalid;
wire m_axis_rc_tready;
// Interface: CQ (RXR)
wire [C_PCI_DATA_WIDTH-1:0] m_axis_cq_tdata;
wire [`SIG_CQ_TUSER_W-1:0] m_axis_cq_tuser;
wire m_axis_cq_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] m_axis_cq_tkeep;
wire m_axis_cq_tvalid;
wire m_axis_cq_tready;
// Interface: CC (TXC)
wire [C_PCI_DATA_WIDTH-1:0] s_axis_cc_tdata;
wire [`SIG_CC_TUSER_W-1:0] s_axis_cc_tuser;
wire s_axis_cc_tlast;
wire [(C_PCI_DATA_WIDTH/32)-1:0] s_axis_cc_tkeep;
wire s_axis_cc_tvalid;
wire s_axis_cc_tready;
// Configuration (CFG) Interface
wire [3:0] pcie_rq_seq_num;
wire pcie_rq_seq_num_vld;
wire [5:0] pcie_rq_tag;
wire pcie_rq_tag_vld;
wire pcie_cq_np_req;
wire [5:0] pcie_cq_np_req_count;
wire cfg_phy_link_down;
wire [3:0] cfg_negotiated_width; // CONFIG_LINK_WIDTH
wire [2:0] cfg_current_speed; // CONFIG_LINK_RATE
wire [2:0] cfg_max_payload; // CONFIG_MAX_PAYLOAD
wire [2:0] cfg_max_read_req; // CONFIG_MAX_READ_REQUEST
wire [7:0] cfg_function_status; // [2] = CONFIG_BUS_MASTER_ENABLE
wire [5:0] cfg_function_power_state; // Ignorable but not removable
wire [11:0] cfg_vf_status; // Ignorable but not removable
wire [17:0] cfg_vf_power_state; // Ignorable but not removable
wire [1:0] cfg_link_power_state; // Ignorable but not removable
// Error Reporting Interface
wire cfg_err_cor_out;
wire cfg_err_nonfatal_out;
wire cfg_err_fatal_out;
wire cfg_ltr_enable;
wire [5:0] cfg_ltssm_state;// TODO: Connect to LED's
wire [1:0] cfg_rcb_status;
wire [1:0] cfg_dpa_substate_change;
wire [1:0] cfg_obff_enable;
wire cfg_pl_status_change;
wire [1:0] cfg_tph_requester_enable;
wire [5:0] cfg_tph_st_mode;
wire [5:0] cfg_vf_tph_requester_enable;
wire [17:0] cfg_vf_tph_st_mode;
wire [7:0] cfg_fc_ph;
wire [11:0] cfg_fc_pd;
wire [7:0] cfg_fc_nph;
wire [11:0] cfg_fc_npd;
wire [7:0] cfg_fc_cplh;
wire [11:0] cfg_fc_cpld;
wire [2:0] cfg_fc_sel;
// Interrupt Interface Signals
wire [3:0] cfg_interrupt_int;
wire [1:0] cfg_interrupt_pending;
wire cfg_interrupt_sent;
wire [1:0] cfg_interrupt_msi_enable;
wire [5:0] cfg_interrupt_msi_vf_enable;
wire [5:0] cfg_interrupt_msi_mmenable;
wire cfg_interrupt_msi_mask_update;
wire [31:0] cfg_interrupt_msi_data;
wire [3:0] cfg_interrupt_msi_select;
wire [31:0] cfg_interrupt_msi_int;
wire [63:0] cfg_interrupt_msi_pending_status;
wire cfg_interrupt_msi_sent;
wire cfg_interrupt_msi_fail;
wire [2:0] cfg_interrupt_msi_attr;
wire cfg_interrupt_msi_tph_present;
wire [1:0] cfg_interrupt_msi_tph_type;
wire [8:0] cfg_interrupt_msi_tph_st_tag;
wire [2:0] cfg_interrupt_msi_function_number;
wire rst_out;
wire [C_NUM_CHNL-1:0] chnl_rx_clk;
wire [C_NUM_CHNL-1:0] chnl_rx;
wire [C_NUM_CHNL-1:0] chnl_rx_ack;
wire [C_NUM_CHNL-1:0] chnl_rx_last;
wire [(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0] chnl_rx_len;
wire [(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0] chnl_rx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_rx_data;
wire [C_NUM_CHNL-1:0] chnl_rx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_rx_data_ren;
wire [C_NUM_CHNL-1:0] chnl_tx_clk;
wire [C_NUM_CHNL-1:0] chnl_tx;
wire [C_NUM_CHNL-1:0] chnl_tx_ack;
wire [C_NUM_CHNL-1:0] chnl_tx_last;
wire [(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0] chnl_tx_len;
wire [(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0] chnl_tx_off;
wire [(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0] chnl_tx_data;
wire [C_NUM_CHNL-1:0] chnl_tx_data_valid;
wire [C_NUM_CHNL-1:0] chnl_tx_data_ren;
genvar chnl;
IBUF
#()
pci_reset_n_ibuf
(.O(pcie_reset_n),
.I(PCIE_RESET_N));
IBUFDS_GTE2
#()
refclk_ibuf
(.O(pcie_refclk),
.ODIV2(),
.I(PCIE_REFCLK_P),
.CEB(1'b0),
.IB(PCIE_REFCLK_N));
OBUF
#()
led_0_obuf
(.O(LED[0]),
.I(cfg_ltssm_state[0]));
OBUF
#()
led_1_obuf
(.O(LED[1]),
.I(cfg_ltssm_state[1]));
OBUF
#()
led_2_obuf
(.O(LED[2]),
.I(cfg_ltssm_state[2]));
OBUF
#()
led_3_obuf
(.O(LED[3]),
.I(cfg_ltssm_state[3]));
OBUF
#()
led_4_obuf
(.O(LED[4]),
.I(cfg_ltssm_state[4]));
OBUF
#()
led_5_obuf
(.O(LED[5]),
.I(cfg_ltssm_state[5]));
OBUF
#()
led_6_obuf
(.O(LED[6]),
.I(pcie_reset_n));
OBUF
#()
led_7_obuf
(.O(LED[7]),
.I(rst_out));
// Core Top Level Wrapper
PCIeGen2x8If128
#()
pcie3_7x_0_i
(//---------------------------------------------------------------------
// PCI Express (pci_exp) Interface
//---------------------------------------------------------------------
.pci_exp_txn ( PCI_EXP_TXN ),
.pci_exp_txp ( PCI_EXP_TXP ),
.pci_exp_rxn ( PCI_EXP_RXN ),
.pci_exp_rxp ( PCI_EXP_RXP ),
//---------------------------------------------------------------------
// AXI Interface
//---------------------------------------------------------------------
.user_clk ( user_clk ),
.user_reset ( user_reset ),
.user_lnk_up ( user_lnk_up ),
.user_app_rdy ( ),
.s_axis_rq_tlast ( s_axis_rq_tlast ),
.s_axis_rq_tdata ( s_axis_rq_tdata ),
.s_axis_rq_tuser ( s_axis_rq_tuser ),
.s_axis_rq_tkeep ( s_axis_rq_tkeep ),
.s_axis_rq_tready ( s_axis_rq_tready ),
.s_axis_rq_tvalid ( s_axis_rq_tvalid ),
.m_axis_rc_tdata ( m_axis_rc_tdata ),
.m_axis_rc_tuser ( m_axis_rc_tuser ),
.m_axis_rc_tlast ( m_axis_rc_tlast ),
.m_axis_rc_tkeep ( m_axis_rc_tkeep ),
.m_axis_rc_tvalid ( m_axis_rc_tvalid ),
.m_axis_rc_tready ( {22{m_axis_rc_tready}} ),
.m_axis_cq_tdata ( m_axis_cq_tdata ),
.m_axis_cq_tuser ( m_axis_cq_tuser ),
.m_axis_cq_tlast ( m_axis_cq_tlast ),
.m_axis_cq_tkeep ( m_axis_cq_tkeep ),
.m_axis_cq_tvalid ( m_axis_cq_tvalid ),
.m_axis_cq_tready ( {22{m_axis_cq_tready}} ),
.s_axis_cc_tdata ( s_axis_cc_tdata ),
.s_axis_cc_tuser ( s_axis_cc_tuser ),
.s_axis_cc_tlast ( s_axis_cc_tlast ),
.s_axis_cc_tkeep ( s_axis_cc_tkeep ),
.s_axis_cc_tvalid ( s_axis_cc_tvalid ),
.s_axis_cc_tready ( s_axis_cc_tready ),
//---------------------------------------------------------------------
// Configuration (CFG) Interface
//---------------------------------------------------------------------
.pcie_rq_seq_num ( pcie_rq_seq_num ),
.pcie_rq_seq_num_vld ( pcie_rq_seq_num_vld ),
.pcie_rq_tag ( pcie_rq_tag ),
.pcie_rq_tag_vld ( pcie_rq_tag_vld ),
.pcie_cq_np_req ( pcie_cq_np_req ),
.pcie_cq_np_req_count ( pcie_cq_np_req_count ),
.cfg_phy_link_down ( cfg_phy_link_down ),
.cfg_phy_link_status ( cfg_phy_link_status),
.cfg_negotiated_width ( cfg_negotiated_width ),
.cfg_current_speed ( cfg_current_speed ),
.cfg_max_payload ( cfg_max_payload ),
.cfg_max_read_req ( cfg_max_read_req ),
.cfg_function_status ( cfg_function_status ),
.cfg_function_power_state ( cfg_function_power_state ),
.cfg_vf_status ( cfg_vf_status ),
.cfg_vf_power_state ( cfg_vf_power_state ),
.cfg_link_power_state ( cfg_link_power_state ),
// Error Reporting Interface
.cfg_err_cor_out ( cfg_err_cor_out ),
.cfg_err_nonfatal_out ( cfg_err_nonfatal_out ),
.cfg_err_fatal_out ( cfg_err_fatal_out ),
.cfg_ltr_enable ( cfg_ltr_enable ),
.cfg_ltssm_state ( cfg_ltssm_state ),
.cfg_rcb_status ( cfg_rcb_status ),
.cfg_dpa_substate_change ( cfg_dpa_substate_change ),
.cfg_obff_enable ( cfg_obff_enable ),
.cfg_pl_status_change ( cfg_pl_status_change ),
.cfg_tph_requester_enable ( cfg_tph_requester_enable ),
.cfg_tph_st_mode ( cfg_tph_st_mode ),
.cfg_vf_tph_requester_enable ( cfg_vf_tph_requester_enable ),
.cfg_vf_tph_st_mode ( cfg_vf_tph_st_mode ),
.cfg_fc_ph ( cfg_fc_ph ),
.cfg_fc_pd ( cfg_fc_pd ),
.cfg_fc_nph ( cfg_fc_nph ),
.cfg_fc_npd ( cfg_fc_npd ),
.cfg_fc_cplh ( cfg_fc_cplh ),
.cfg_fc_cpld ( cfg_fc_cpld ),
.cfg_fc_sel ( cfg_fc_sel ),
//---------------------------------------------------------------------
// EP Only
//---------------------------------------------------------------------
// Interrupt Interface Signals
.cfg_interrupt_int ( cfg_interrupt_int ),
.cfg_interrupt_pending ( cfg_interrupt_pending ),
.cfg_interrupt_sent ( cfg_interrupt_sent ),
.cfg_interrupt_msi_enable ( cfg_interrupt_msi_enable ),
.cfg_interrupt_msi_vf_enable ( cfg_interrupt_msi_vf_enable ),
.cfg_interrupt_msi_mmenable ( cfg_interrupt_msi_mmenable ),
.cfg_interrupt_msi_mask_update ( cfg_interrupt_msi_mask_update ),
.cfg_interrupt_msi_data ( cfg_interrupt_msi_data ),
.cfg_interrupt_msi_select ( cfg_interrupt_msi_select ),
.cfg_interrupt_msi_int ( cfg_interrupt_msi_int ),
.cfg_interrupt_msi_pending_status ( cfg_interrupt_msi_pending_status ),
.cfg_interrupt_msi_sent ( cfg_interrupt_msi_sent ),
.cfg_interrupt_msi_fail ( cfg_interrupt_msi_fail ),
.cfg_interrupt_msi_attr ( cfg_interrupt_msi_attr ),
.cfg_interrupt_msi_tph_present ( cfg_interrupt_msi_tph_present ),
.cfg_interrupt_msi_tph_type ( cfg_interrupt_msi_tph_type ),
.cfg_interrupt_msi_tph_st_tag ( cfg_interrupt_msi_tph_st_tag ),
.cfg_interrupt_msi_function_number ( cfg_interrupt_msi_function_number ),
//---------------------------------------------------------------------
// System(SYS) Interface
//---------------------------------------------------------------------
.sys_clk (pcie_refclk),
.sys_reset (~pcie_reset_n));
riffa_wrapper_vc709
#(/*AUTOINSTPARAM*/
// Parameters
.C_LOG_NUM_TAGS (C_LOG_NUM_TAGS),
.C_NUM_CHNL (C_NUM_CHNL),
.C_PCI_DATA_WIDTH (C_PCI_DATA_WIDTH),
.C_MAX_PAYLOAD_BYTES (C_MAX_PAYLOAD_BYTES))
riffa
(// Outputs
.M_AXIS_CQ_TREADY (m_axis_cq_tready),
.M_AXIS_RC_TREADY (m_axis_rc_tready),
.S_AXIS_CC_TVALID (s_axis_cc_tvalid),
.S_AXIS_CC_TLAST (s_axis_cc_tlast),
.S_AXIS_CC_TDATA (s_axis_cc_tdata[C_PCI_DATA_WIDTH-1:0]),
.S_AXIS_CC_TKEEP (s_axis_cc_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.S_AXIS_CC_TUSER (s_axis_cc_tuser[`SIG_CC_TUSER_W-1:0]),
.S_AXIS_RQ_TVALID (s_axis_rq_tvalid),
.S_AXIS_RQ_TLAST (s_axis_rq_tlast),
.S_AXIS_RQ_TDATA (s_axis_rq_tdata[C_PCI_DATA_WIDTH-1:0]),
.S_AXIS_RQ_TKEEP (s_axis_rq_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.S_AXIS_RQ_TUSER (s_axis_rq_tuser[`SIG_RQ_TUSER_W-1:0]),
.USER_CLK (user_clk),
.USER_RESET (user_reset),
.CFG_INTERRUPT_INT (cfg_interrupt_int[3:0]),
.CFG_INTERRUPT_PENDING (cfg_interrupt_pending[1:0]),
.CFG_INTERRUPT_MSI_SELECT (cfg_interrupt_msi_select[3:0]),
.CFG_INTERRUPT_MSI_INT (cfg_interrupt_msi_int[31:0]),
.CFG_INTERRUPT_MSI_PENDING_STATUS(cfg_interrupt_msi_pending_status[63:0]),
.CFG_INTERRUPT_MSI_ATTR (cfg_interrupt_msi_attr[2:0]),
.CFG_INTERRUPT_MSI_TPH_PRESENT (cfg_interrupt_msi_tph_present),
.CFG_INTERRUPT_MSI_TPH_TYPE (cfg_interrupt_msi_tph_type[1:0]),
.CFG_INTERRUPT_MSI_TPH_ST_TAG (cfg_interrupt_msi_tph_st_tag[8:0]),
.CFG_INTERRUPT_MSI_FUNCTION_NUMBER(cfg_interrupt_msi_function_number[2:0]),
.CFG_FC_SEL (cfg_fc_sel[2:0]),
.PCIE_CQ_NP_REQ (pcie_cq_np_req),
.RST_OUT (rst_out),
.CHNL_RX (chnl_rx[C_NUM_CHNL-1:0]),
.CHNL_RX_LAST (chnl_rx_last[C_NUM_CHNL-1:0]),
.CHNL_RX_LEN (chnl_rx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_RX_OFF (chnl_rx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_RX_DATA (chnl_rx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_RX_DATA_VALID (chnl_rx_data_valid[C_NUM_CHNL-1:0]),
.CHNL_TX_ACK (chnl_tx_ack[C_NUM_CHNL-1:0]),
.CHNL_TX_DATA_REN (chnl_tx_data_ren[C_NUM_CHNL-1:0]),
// Inputs
.M_AXIS_CQ_TVALID (m_axis_cq_tvalid),
.M_AXIS_CQ_TLAST (m_axis_cq_tlast),
.M_AXIS_CQ_TDATA (m_axis_cq_tdata[C_PCI_DATA_WIDTH-1:0]),
.M_AXIS_CQ_TKEEP (m_axis_cq_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.M_AXIS_CQ_TUSER (m_axis_cq_tuser[`SIG_CQ_TUSER_W-1:0]),
.M_AXIS_RC_TVALID (m_axis_rc_tvalid),
.M_AXIS_RC_TLAST (m_axis_rc_tlast),
.M_AXIS_RC_TDATA (m_axis_rc_tdata[C_PCI_DATA_WIDTH-1:0]),
.M_AXIS_RC_TKEEP (m_axis_rc_tkeep[(C_PCI_DATA_WIDTH/32)-1:0]),
.M_AXIS_RC_TUSER (m_axis_rc_tuser[`SIG_RC_TUSER_W-1:0]),
.S_AXIS_CC_TREADY (s_axis_cc_tready),
.S_AXIS_RQ_TREADY (s_axis_rq_tready),
.CFG_INTERRUPT_MSI_ENABLE (cfg_interrupt_msi_enable[1:0]),
.CFG_INTERRUPT_MSI_MASK_UPDATE (cfg_interrupt_msi_mask_update),
.CFG_INTERRUPT_MSI_DATA (cfg_interrupt_msi_data[31:0]),
.CFG_INTERRUPT_MSI_SENT (cfg_interrupt_msi_sent),
.CFG_INTERRUPT_MSI_FAIL (cfg_interrupt_msi_fail),
.CFG_FC_CPLH (cfg_fc_cplh[7:0]),
.CFG_FC_CPLD (cfg_fc_cpld[11:0]),
.CFG_NEGOTIATED_WIDTH (cfg_negotiated_width[3:0]),
.CFG_CURRENT_SPEED (cfg_current_speed[2:0]),
.CFG_MAX_PAYLOAD (cfg_max_payload[2:0]),
.CFG_MAX_READ_REQ (cfg_max_read_req[2:0]),
.CFG_FUNCTION_STATUS (cfg_function_status[7:0]),
.CFG_RCB_STATUS (cfg_rcb_status[1:0]),
.CHNL_RX_CLK (chnl_rx_clk[C_NUM_CHNL-1:0]),
.CHNL_RX_ACK (chnl_rx_ack[C_NUM_CHNL-1:0]),
.CHNL_RX_DATA_REN (chnl_rx_data_ren[C_NUM_CHNL-1:0]),
.CHNL_TX_CLK (chnl_tx_clk[C_NUM_CHNL-1:0]),
.CHNL_TX (chnl_tx[C_NUM_CHNL-1:0]),
.CHNL_TX_LAST (chnl_tx_last[C_NUM_CHNL-1:0]),
.CHNL_TX_LEN (chnl_tx_len[(C_NUM_CHNL*`SIG_CHNL_LENGTH_W)-1:0]),
.CHNL_TX_OFF (chnl_tx_off[(C_NUM_CHNL*`SIG_CHNL_OFFSET_W)-1:0]),
.CHNL_TX_DATA (chnl_tx_data[(C_NUM_CHNL*C_PCI_DATA_WIDTH)-1:0]),
.CHNL_TX_DATA_VALID (chnl_tx_data_valid[C_NUM_CHNL-1:0]));
clk_250MIn_1
clkgen
(.user_clk(user_clk),
.riffa_5_clk(riffa_5_clk),
.riffa_10_clk(riffa_10_clk),
.riffa_25_clk(riffa_25_clk),
.riffa_50_clk(riffa_50_clk),
.riffa_75_clk(riffa_75_clk),
.riffa_100_clk(riffa_100_clk));
clk_250MIn_2
clkgen_2
(.user_clk(user_clk),
.riffa_125_clk(riffa_125_clk),
.riffa_150_clk(riffa_150_clk),
.riffa_175_clk(riffa_175_clk),
.riffa_200_clk(riffa_200_clk),
.riffa_225_clk(riffa_225_clk),
.riffa_250_clk(riffa_250_clk));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_5mhz
(.CLK(riffa_5_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[0]),
.CHNL_RX(chnl_rx[0]),
.CHNL_RX_ACK(chnl_rx_ack[0]),
.CHNL_RX_LAST(chnl_rx_last[0]),
.CHNL_RX_LEN(chnl_rx_len[32*0 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*0 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[0]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[0]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[0]),
.CHNL_TX(chnl_tx[0]),
.CHNL_TX_ACK(chnl_tx_ack[0]),
.CHNL_TX_LAST(chnl_tx_last[0]),
.CHNL_TX_LEN(chnl_tx_len[32*0 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*0 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*0 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[0]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[0]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_10mhz
(.CLK(riffa_10_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[1]),
.CHNL_RX(chnl_rx[1]),
.CHNL_RX_ACK(chnl_rx_ack[1]),
.CHNL_RX_LAST(chnl_rx_last[1]),
.CHNL_RX_LEN(chnl_rx_len[32*1 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*1 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[1]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[1]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[1]),
.CHNL_TX(chnl_tx[1]),
.CHNL_TX_ACK(chnl_tx_ack[1]),
.CHNL_TX_LAST(chnl_tx_last[1]),
.CHNL_TX_LEN(chnl_tx_len[32*1 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*1 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*1 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[1]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[1]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_25mhz
(.CLK(riffa_25_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[2]),
.CHNL_RX(chnl_rx[2]),
.CHNL_RX_ACK(chnl_rx_ack[2]),
.CHNL_RX_LAST(chnl_rx_last[2]),
.CHNL_RX_LEN(chnl_rx_len[32*2 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*2 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[2]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[2]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[2]),
.CHNL_TX(chnl_tx[2]),
.CHNL_TX_ACK(chnl_tx_ack[2]),
.CHNL_TX_LAST(chnl_tx_last[2]),
.CHNL_TX_LEN(chnl_tx_len[32*2 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*2 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*2 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[2]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[2]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_50mhz
(.CLK(riffa_50_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[3]),
.CHNL_RX(chnl_rx[3]),
.CHNL_RX_ACK(chnl_rx_ack[3]),
.CHNL_RX_LAST(chnl_rx_last[3]),
.CHNL_RX_LEN(chnl_rx_len[32*3 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*3 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[3]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[3]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[3]),
.CHNL_TX(chnl_tx[3]),
.CHNL_TX_ACK(chnl_tx_ack[3]),
.CHNL_TX_LAST(chnl_tx_last[3]),
.CHNL_TX_LEN(chnl_tx_len[32*3 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*3 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*3 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[3]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[3]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_75mhz
(.CLK(riffa_75_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[4]),
.CHNL_RX(chnl_rx[4]),
.CHNL_RX_ACK(chnl_rx_ack[4]),
.CHNL_RX_LAST(chnl_rx_last[4]),
.CHNL_RX_LEN(chnl_rx_len[32*4 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*4 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[4]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[4]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[4]),
.CHNL_TX(chnl_tx[4]),
.CHNL_TX_ACK(chnl_tx_ack[4]),
.CHNL_TX_LAST(chnl_tx_last[4]),
.CHNL_TX_LEN(chnl_tx_len[32*4 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*4 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*4 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[4]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[4]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_100mhz
(.CLK(riffa_100_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[5]),
.CHNL_RX(chnl_rx[5]),
.CHNL_RX_ACK(chnl_rx_ack[5]),
.CHNL_RX_LAST(chnl_rx_last[5]),
.CHNL_RX_LEN(chnl_rx_len[32*5 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*5 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[5]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[5]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[5]),
.CHNL_TX(chnl_tx[5]),
.CHNL_TX_ACK(chnl_tx_ack[5]),
.CHNL_TX_LAST(chnl_tx_last[5]),
.CHNL_TX_LEN(chnl_tx_len[32*5 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*5 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*5 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[5]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[5]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_125mhz
(.CLK(riffa_125_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[6]),
.CHNL_RX(chnl_rx[6]),
.CHNL_RX_ACK(chnl_rx_ack[6]),
.CHNL_RX_LAST(chnl_rx_last[6]),
.CHNL_RX_LEN(chnl_rx_len[32*6 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*6 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[6]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[6]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[6]),
.CHNL_TX(chnl_tx[6]),
.CHNL_TX_ACK(chnl_tx_ack[6]),
.CHNL_TX_LAST(chnl_tx_last[6]),
.CHNL_TX_LEN(chnl_tx_len[32*6 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*6 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*6 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[6]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[6]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_150mhz
(.CLK(riffa_150_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[7]),
.CHNL_RX(chnl_rx[7]),
.CHNL_RX_ACK(chnl_rx_ack[7]),
.CHNL_RX_LAST(chnl_rx_last[7]),
.CHNL_RX_LEN(chnl_rx_len[32*7 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*7 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[7]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[7]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[7]),
.CHNL_TX(chnl_tx[7]),
.CHNL_TX_ACK(chnl_tx_ack[7]),
.CHNL_TX_LAST(chnl_tx_last[7]),
.CHNL_TX_LEN(chnl_tx_len[32*7 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*7 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*7 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[7]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[7]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_175mhz
(.CLK(riffa_175_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[8]),
.CHNL_RX(chnl_rx[8]),
.CHNL_RX_ACK(chnl_rx_ack[8]),
.CHNL_RX_LAST(chnl_rx_last[8]),
.CHNL_RX_LEN(chnl_rx_len[32*8 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*8 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[8]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[8]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[8]),
.CHNL_TX(chnl_tx[8]),
.CHNL_TX_ACK(chnl_tx_ack[8]),
.CHNL_TX_LAST(chnl_tx_last[8]),
.CHNL_TX_LEN(chnl_tx_len[32*8 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*8 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*8 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[8]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[8]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_200mhz
(.CLK(riffa_200_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[9]),
.CHNL_RX(chnl_rx[9]),
.CHNL_RX_ACK(chnl_rx_ack[9]),
.CHNL_RX_LAST(chnl_rx_last[9]),
.CHNL_RX_LEN(chnl_rx_len[32*9 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*9 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[9]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[9]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[9]),
.CHNL_TX(chnl_tx[9]),
.CHNL_TX_ACK(chnl_tx_ack[9]),
.CHNL_TX_LAST(chnl_tx_last[9]),
.CHNL_TX_LEN(chnl_tx_len[32*9 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*9 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*9 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[9]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[9]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_225mhz
(.CLK(riffa_225_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[10]),
.CHNL_RX(chnl_rx[10]),
.CHNL_RX_ACK(chnl_rx_ack[10]),
.CHNL_RX_LAST(chnl_rx_last[10]),
.CHNL_RX_LEN(chnl_rx_len[32*10 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*10 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[10]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[10]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[10]),
.CHNL_TX(chnl_tx[10]),
.CHNL_TX_ACK(chnl_tx_ack[10]),
.CHNL_TX_LAST(chnl_tx_last[10]),
.CHNL_TX_LEN(chnl_tx_len[32*10 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*10 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*10 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[10]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[10]));
chnl_tester
#(.C_PCI_DATA_WIDTH(C_PCI_DATA_WIDTH))
chnl_tester_250mhz
(.CLK(riffa_250_clk),
.RST(rst_out), // riffa_reset includes riffa_endpoint resets
// Rx interface
.CHNL_RX_CLK(chnl_rx_clk[11]),
.CHNL_RX(chnl_rx[11]),
.CHNL_RX_ACK(chnl_rx_ack[11]),
.CHNL_RX_LAST(chnl_rx_last[11]),
.CHNL_RX_LEN(chnl_rx_len[32*11 +:32]),
.CHNL_RX_OFF(chnl_rx_off[31*11 +:31]),
.CHNL_RX_DATA(chnl_rx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_RX_DATA_VALID(chnl_rx_data_valid[11]),
.CHNL_RX_DATA_REN(chnl_rx_data_ren[11]),
// Tx interface
.CHNL_TX_CLK(chnl_tx_clk[11]),
.CHNL_TX(chnl_tx[11]),
.CHNL_TX_ACK(chnl_tx_ack[11]),
.CHNL_TX_LAST(chnl_tx_last[11]),
.CHNL_TX_LEN(chnl_tx_len[32*11 +:32]),
.CHNL_TX_OFF(chnl_tx_off[31*11 +:31]),
.CHNL_TX_DATA(chnl_tx_data[C_PCI_DATA_WIDTH*11 +:C_PCI_DATA_WIDTH]),
.CHNL_TX_DATA_VALID(chnl_tx_data_valid[11]),
.CHNL_TX_DATA_REN(chnl_tx_data_ren[11]));
endmodule
// Local Variables:
// verilog-library-directories:("." "../../../engine/" "ultrascale/rx/" "ultrascale/tx/" "classic/rx/" "classic/tx/" "../../../riffa/")
// End:

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fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/ip/PCIeGen2x8If128.xci Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>xilinx.com</spirit:vendor>
<spirit:library>xci</spirit:library>
<spirit:name>unknown</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>PCIeGen2x8If128</spirit:instanceName>
<spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="pcie3_7x" spirit:version="4.1"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.ARI_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_CC_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_CQ_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_CLIENT_TAG">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_MSG_ROUTE">0x00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_RX_MSG_INTFC">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RC_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RC_STRADDLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RQ_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_CTL_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_EXT_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_FC_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_MGMT_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_STATUS_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_TX_MSG_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.COMPLETION_SPACE">16KB</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DATA_WIDTH">128</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DEV_PORT_TYPE">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_CH_GT_DRP">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_PIPE_INTERFACE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_STARTUP_PRIMITIVE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MSIX_EN">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MSI_EN">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_DRP">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_EXT_CLK">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_EXT_GT_COMMON">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_FAST_CONFIG">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_LINK_SPEED">3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_USE_MODE">2.1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PER_FUNC_STATUS_IF">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_AER_CAP_ECRC_CHECK_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_AER_CAP_ECRC_GEN_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_AER_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_ARI_CAP_NEXT_FUNC">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR0_APERTURE_SIZE">0b00011</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR0_CONTROL">0b100</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR1_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR1_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR2_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR2_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR3_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR3_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR4_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR4_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR5_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_BAR5_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_CAPABILITY_POINTER">0x80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_CLASS_CODE">0x058000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEVICE_ID">0x7028</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_LTR_SUPPORT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_OBFF_SUPPORT">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP_EXT_TAG_SUPPORTED">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DEV_CAP_MAX_PAYLOAD_SIZE">0b010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION0">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION1">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION2">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION3">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION4">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION5">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION6">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION7">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_DSN_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_EXPANSION_ROM_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_EXPANSION_ROM_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_INTERRUPT_PIN">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_LINK_CAP_ASPM_SUPPORT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_LINK_STATUS_SLOT_CLOCK_CONFIG">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_LTR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_NEXTPTR">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_MSI_CAP_NEXTPTR">0xC0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PB_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PM_CAP_NEXTPTR">0x90</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D0">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D1">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D3HOT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_PM_CAP_SUPP_D1_STATE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_RBAR_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_RBAR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_RBAR_CAP_SIZE0">0x00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_RBAR_CAP_SIZE1">0x00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_RBAR_CAP_SIZE2">0x00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_REVISION_ID">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR0_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR0_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR1_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR1_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR2_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR2_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR3_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR3_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR4_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR4_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR5_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_BAR5_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_CAP_INITIAL_VF">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_CAP_TOTAL_VF">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_CAP_VER">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_FIRST_VF_OFFSET">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_FUNC_DEP_LINK">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_SUPPORTED_PAGE_SIZE">0x00000553</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SRIOV_VF_DEVICE_ID">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SUBSYSTEM_ID">0x0007</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_SUBSYSTEM_VENDOR_ID">0x10EE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_ST_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_VC_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_VENDOR_ID">0x10EE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_AER_CAP_ECRC_CHECK_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_AER_CAP_ECRC_GEN_CAPABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_AER_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR0_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR0_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR1_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR1_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR2_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR2_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR3_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR3_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR4_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR4_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR5_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_BAR5_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_CAPABILITY_POINTER">0x80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_CLASS_CODE">0x058000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_EXPANSION_ROM_ENABLE">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_NEXTPTR">0x00</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RCV_MSG_IF">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_PF_ENABLE_REG">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TRANSCEIVER_CTRL_STATUS_PORTS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TX_FC_IF">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_ST_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_ST_TABLE_LOC">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_ST_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_ARI_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_DEV_SPECIFIC_MODE">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_INT_VEC_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_ST_MODE_SEL">0x0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_TPHR_CAP_VER">0x1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.pcie_blk_locn">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.silicon_revision">Production</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.xlnx_ref_board">1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXISTEN_IF_RC_STRADDLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">PCIeGen2x8If128</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_AER_CAP_ECRC_CHECK_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_AER_CAP_ECRC_GEN_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_CLASS_CODE">058000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEVICE_ID">7028</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_LINK_STATUS_SLOT_CLOCK_CONFIG">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_PM_CAP_PMESUPPORT_D3HOT">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_SUBSYSTEM_VENDOR_ID">10EE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF0_Use_Class_Code_Lookup_Assistant">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_AER_CAP_ECRC_CHECK_CAPABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PF1_AER_CAP_ECRC_GEN_CAPABLE">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SRIOV_CAP_ENABLE_EXT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TL_PF_ENABLE_REG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_BOARD_FLOW">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF0_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF1_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF2_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF3_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF4_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_PBA_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_PBA_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_BIR">BAR_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_OFFSET">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSIX_CAP_TABLE_SIZE">000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VF5_MSI_CAP_MULTIMSGCAP">1_vector</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.alignment_mode">DWORD_Aligned</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.aspm_support">No_ASPM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_freq">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_client_tag">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_msg_route">2FFFF</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_rx_msg_intfc">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_width">128_bit</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ctl_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ext_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_fc_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_mgmt_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_status_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_tx_msg_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.device_port_type">PCI_Express_Endpoint_device</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_ch_gt_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_clk">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_gt_common">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_pipe_interface">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_startup">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_msi_per_vec_masking">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_pcie_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_powerdown">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_transceiver_status_ports">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ext_pcie_cfg_space_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.extended_tag_field">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y1">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.mode_selection">Advanced</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pcie_blk_locn">X0Y1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.per_func_status_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.perf_level">Extreme</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.performance">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_size">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_base_class_menu">Simple_communication_controllers</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_base">05</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_sub">80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dev_cap_max_payload">512_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ltr_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msi_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msix_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_pb_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_cap_ver">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sub_class_interface_menu">Generic_XT_compatible_serial_controller</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_tphr_enable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_vc_cap_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_base_class_menu">Simple_communication_controllers</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_base">05</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_sub">80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dev_cap_max_payload">512_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msi_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msix_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_pb_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_enabled">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_prefetchable">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_scale">Kilobytes</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sub_class_interface_menu">Generic_XT_compatible_serial_controller</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tandem_mode">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tl_pf0_enable_reg">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tx_fc_if">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.vendor_id">10EE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">virtex7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD">xilinx.com:vc709:part0:1.5</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">ffg1761</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE">C</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Flow</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
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</spirit:componentInstances>
</spirit:design>

562
fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/ip/clk_250MIn_1/clk_250MIn_1.xci Normal file
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<?xml version="1.0" encoding="UTF-8"?>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_OUT_FREQ">5.000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_OUT_FREQ">5</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_OUT_FREQ">24.800</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_OUT_FREQ">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_OUT_FREQ">51.667</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_OUT_FREQ">50</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_USED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUTPHY_MODE">VCO</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLOCK_HOLD">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_DIVCLK_DIVIDE">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_STARTUP_WAIT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0A"> Output Output Phase Duty Cycle Pk-to-Pk Phase</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0B"> Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW1">CLK_OUT1_____5.000______0.000______50.0______943.594____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW2">CLK_OUT2____10.000______0.000______50.0______855.836____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW3">CLK_OUT3____24.800______0.000______50.0______752.191____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW4">CLK_OUT4____51.667______0.000______50.0______678.319____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW5">CLK_OUT5____77.500______0.000______50.0______641.055____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW6">CLK_OUT6___103.333______0.000______50.0______615.875____894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW7">no_CLK_OUT7_output</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_MMCM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_PLL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_MULT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKIN_PERIOD">1.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLK_FEEDBACK">CLKFBOUT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_COMPENSATION">SYSTEM_SYNCHRONOUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_NOTES">No notes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_REF_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_POWER_DOWN_PORT">power_down</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMARY_PORT">user_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMITIVE">MMCM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMTYPE_SEL">AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSCLK_PORT">psclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSDONE_PORT">psdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSEN_PORT">psen</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSINCDEC_PORT">psincdec</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_LOW">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_PORT">clk_rst</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_PORT">clk_in2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MODE">CENTER_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_PERIOD">4000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_TIME">0.004</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_STATUS_PORT">STATUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">11</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKFB_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT1_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT2_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT3_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT4_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLK_VALID">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLOCK_SEQUENCING">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_PHASE_SHIFT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_RECONFIG">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FAST_SIMULATION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREEZE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREQ_SYNTH">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_SWITCHOVER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_LOCKED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MAX_I_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_O_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_POWER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_PHASE_ALIGNMENT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_POWER_DOWN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_RESET">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SAFE_CLOCK_STARTUP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SPREAD_SPECTRUM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_STATUS">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_component_name">clk_250MIn_1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CALC_DONE">empty</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCDONE_PORT">cddcdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCREQ_PORT">cddcreq</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_N_PORT">clkfb_in_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_PORT">clkfb_in</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_JITTER">943.594</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_OUT_FREQ">5</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_JITTER">855.836</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_OUT_FREQ">10</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_JITTER">752.191</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_OUT_FREQ">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_JITTER">678.319</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_OUT_FREQ">50</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_JITTER">641.055</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_OUT_FREQ">75</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_JITTER">615.875</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_PHASE_ERROR">894.366</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_JITTER">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_PHASE_ERROR">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_USED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUTPHY_REQUESTED_FREQ">600.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_PORT">riffa_5_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_PORT">riffa_10_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_PORT">riffa_25_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_PORT">riffa_50_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_PORT">riffa_75_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_PORT">riffa_100_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_MGR_TYPE">auto</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">clk_250MIn_1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DWE_PORT">dwe</spirit:configurableElementValue>
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fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/ip/clk_250MIn_2/clk_250MIn_2.xci Normal file
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CDDCDONE_PORT">cddcdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CDDCREQ_PORT">cddcreq</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_N_PORT">clkfb_in_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_PORT">clkfb_in</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT2_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT3_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT4_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT5_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_DUTY_CYCLE">50.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_OUT_FREQ">250.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT6_USED">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUT7_USED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLKOUTPHY_MODE">VCO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT1_PORT">riffa_125_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT2_PORT">riffa_150_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT3_PORT">riffa_175_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT4_PORT">riffa_200_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT5_PORT">riffa_225_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT6_PORT">riffa_250_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CLOCK_MGR_TYPE">NA</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_CLKOUTPHY">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CDDC">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW0">Input Clock Freq (MHz) Input Jitter (UI)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW1">__primary_____________250____________0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INCLK_SUM_ROW2">no_secondary_input_clock </spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_INTERFACE_SELECTION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_MULT_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKFBOUT_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DIVIDE_F">4.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT0_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT1_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT2_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT3_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_CASCADE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT4_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT5_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLKOUT6_USE_FINE_PS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_CLOCK_HOLD">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MMCM_STARTUP_WAIT">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0A"> Output Output Phase Duty Cycle Pk-to-Pk Phase</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW0B"> Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW1">CLK_OUT1___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW2">CLK_OUT2___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW3">CLK_OUT3___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW4">CLK_OUT4___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW5">CLK_OUT5___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW6">CLK_OUT6___250.000______0.000______50.0_______89.528_____85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUTCLK_SUM_ROW7">no_CLK_OUT7_output</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_MMCM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OVERRIDE_PLL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_MULT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKIN_PERIOD">1.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_CLK_FEEDBACK">CLKFBOUT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_COMPENSATION">SYSTEM_SYNCHRONOUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_NOTES">No notes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PLL_REF_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_POWER_DOWN_PORT">power_down</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMARY_PORT">user_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMITIVE">PLL</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIMTYPE_SEL">AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSCLK_PORT">psclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSDONE_PORT">psdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSEN_PORT">psen</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PSINCDEC_PORT">psincdec</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_LOW">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RESET_PORT">clk_rst</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_IN_TIMEPERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_PORT">clk_in2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SECONDARY_SOURCE">Single_ended_clock_capable_pin</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MODE">CENTER_HIGH</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_PERIOD">4000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SS_MOD_TIME">0.004</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_STATUS_PORT">STATUS</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">11</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKFB_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT1_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT2_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT3_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLKOUT4_BAR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLK_VALID">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_CLOCK_SEQUENCING">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_PHASE_SHIFT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_DYN_RECONFIG">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FAST_SIMULATION">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREEZE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_FREQ_SYNTH">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_STOPPED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INCLK_SWITCHOVER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_LOCKED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MAX_I_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_O_JITTER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_MIN_POWER">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_PHASE_ALIGNMENT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_POWER_DOWN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_RESET">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SAFE_CLOCK_STARTUP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SPREAD_SPECTRUM">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_STATUS">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_component_name">clk_250MIn_2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CALC_DONE">empty</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCDONE_PORT">cddcdone</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CDDCREQ_PORT">cddcreq</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_N_PORT">clkfb_in_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_PORT">clkfb_in</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_P_PORT">clkfb_in_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_IN_SIGNALING">SINGLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_N_PORT">clkfb_out_n</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_PORT">clkfb_out</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_OUT_P_PORT">clkfb_out_p</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKFB_STOPPED_PORT">clkfb_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_JITTER_PS">40.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN1_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_JITTER_PS">100.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKIN2_UI_JITTER">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT1_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT2_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT3_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT4_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT5_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_JITTER">89.528</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_PHASE_ERROR">85.928</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_OUT_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT6_USED">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_DRIVES">BUFG</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_JITTER">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_PHASE_ERROR">0.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_DUTY_CYCLE">50.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_OUT_FREQ">100.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_REQUESTED_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_SEQUENCE_NUMBER">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUT7_USED">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLKOUTPHY_REQUESTED_FREQ">600.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_IN_SEL_PORT">clk_in_sel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_PORT">riffa_125_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT1_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_PORT">riffa_150_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT2_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_PORT">riffa_175_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT3_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_PORT">riffa_200_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT4_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_PORT">riffa_225_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT5_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_PORT">riffa_250_clk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT6_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_PORT">clk_out7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_OUT7_USE_FINE_PS_GUI">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLK_VALID_PORT">CLK_VALID</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_MGR_TYPE">auto</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">clk_250MIn_2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DADDR_PORT">daddr</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DCLK_PORT">dclk</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DEN_PORT">den</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN1_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIFF_CLK_IN2_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DIN_PORT">din</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DOUT_PORT">dout</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DRDY_PORT">drdy</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DWE_PORT">dwe</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CDDC">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CLKOUTPHY">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FEEDBACK_SOURCE">FDBK_AUTO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_CLK_STOPPED_PORT">input_clk_stopped</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_MODE">frequency</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERFACE_SELECTION">Enable_AXI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_FREQ_UNITS">Units_MHz</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.IN_JITTER_UNITS">Units_UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_OPTIONS">UI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.JITTER_SEL">No_Jitter</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCKED_PORT">clk_locked</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_MULT_F">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKFBOUT_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN1_PERIOD">4.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKIN2_PERIOD">10.0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DIVIDE_F">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT0_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT1_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT2_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT3_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_CASCADE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT4_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DIVIDE">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT5_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLKOUT6_USE_FINE_PS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_CLOCK_HOLD">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_COMPENSATION">ZHOLD</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_DIVCLK_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_NOTES">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER1">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_REF_JITTER2">0.010</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MMCM_STARTUP_WAIT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.NUM_OUT_CLKS">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_MMCM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERRIDE_PLL">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PHASE_DUTY_CONFIG">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLATFORM">UNKNOWN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_BANDWIDTH">OPTIMIZED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_MULT">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKFBOUT_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKIN_PERIOD">10.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DIVIDE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_DUTY_CYCLE">0.500</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT0_PHASE">0.000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PLL_CLKOUT1_DIVIDE">1</spirit:configurableElementValue>
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fpga/xilinx/vc709/VC709_Gen2x8If128_CLK/prj/VC709_Gen2x8If128.xpr Normal file
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