diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..d442a6e --- /dev/null +++ b/Makefile @@ -0,0 +1,76 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Top-level makefile for building a RIFFA distribution +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- +include release.mk +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +RIFFA_ROOT_PATH := $(CURRENT_PATH) + +RELEASE_VER=2.2.1 +RELEASE_DIR=riffa_$(RELEASE_VER) +RELEASE_PATH=$(CURRENT_PATH)/$(RELEASE_DIR) +RELEASE_SRC_DIR=$(RELEASE_DIR)/source +RELEASE_SRC_PATH=$(CURRENT_PATH)/$(RELEASE_SRC_DIR) +RELEASE_DOC_DIR=$(RELEASE_DIR)/documentation +RELEASE_DOC_PATH=$(CURRENT_PATH)/$(RELEASE_DOC_DIR) +RELEASE_INSTALL_DIR=$(RELEASE_DIR)/install +RELEASE_INSTALL_PATH=$(CURRENT_PATH)/$(RELEASE_INSTALL_DIR) + +VENDORS=altera xilinx +SUBDIRS=c_c++ docs driver fpga java matlab python #install + +all-boards: + $(MAKE) -C fpga $(VENDORS) + +$(RELEASE_DIR): + mkdir $@ + +$(RELEASE_SRC_DIR): $(RELEASE_DIR) check-release + mkdir $@ + +$(RELEASE_DOC_DIR): $(RELEASE_DIR) check-release + mkdir $@ + +release: clean $(RELEASE_DIR) $(RELEASE_SRC_DIR) $(RELEASE_DOC_DIR) $(SUBDIRS) + +$(SUBDIRS):: + make -C $@ $(MAKECMDGOALS) RELEASE_SRC_PATH=$(RELEASE_SRC_PATH) RELEASE_VER=$(RELEASE_VER) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) RELEASE_DOC_PATH=$(RELEASE_DOC_PATH) + +clean: + rm -rf $(RELEASE_DIR) diff --git a/c_c++/Makefile b/c_c++/Makefile new file mode 100644 index 0000000..16d0a9f --- /dev/null +++ b/c_c++/Makefile @@ -0,0 +1,57 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the C/C++ subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH to be set +# by parent Makefile. +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) +DEST_PATH := $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/ +include $(RIFFA_ROOT_PATH)/release.mk + +release: check-release-src clean-release + cp -r $(CURRENT_PATH) $(DEST_PATH) + rm -r $(DEST_PATH)/Makefile + +clean-release: check-release-src + rm -rf $(DEST_PATH) + +clean: check + diff --git a/docs/Makefile b/docs/Makefile new file mode 100644 index 0000000..a7fb22b --- /dev/null +++ b/docs/Makefile @@ -0,0 +1,65 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the C/C++ subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH to be set +# by parent Makefile. +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) + +include $(RIFFA_ROOT_PATH)/release.mk + +all:docs + +docs: riffa_documentation.pdf + +riffa_documentation.pdf:riffa_documentation.tex images/* images/*/* + pdflatex \\nonstopmode\\input riffa_documentation.tex + pdflatex \\nonstopmode\\input riffa_documentation.tex + pdflatex \\nonstopmode\\input riffa_documentation.tex + +release: check-release-doc docs clean-release + cp riffa_documentation.pdf $(RELEASE_DOC_PATH)/RIFFA_$(RELEASE_VER)_Instructions.pdf + +clean-release: check-release-src + rm -rf $(RELEASE_SRC_PATH)/documentation + +clean: + rm -rf *~ *.aux *.toc riffa_documentation.pdf *.log diff --git a/driver/Makefile b/driver/Makefile new file mode 100644 index 0000000..7ae572a --- /dev/null +++ b/driver/Makefile @@ -0,0 +1,56 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the driver subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH to be set +# by parent Makefile. +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) +include $(RIFFA_ROOT_PATH)/release.mk + +release: check-release-src clean clean-release + cp -r $(CURRENT_PATH) $(RELEASE_SRC_PATH)/ + rm -r $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/Makefile + +clean-release: check-release-src + rm -rf $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + +clean: + sudo make -C linux $@ diff --git a/fpga/Makefile b/fpga/Makefile index c746113..043c21e 100644 --- a/fpga/Makefile +++ b/fpga/Makefile @@ -40,19 +40,36 @@ #----------------------------------------------------------------------- CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) -RIFFA_PATH:=$(CURRENT_PATH)/riffa_hdl -VENDORS:= xilinx altera +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) +RIFFA_ROOT_PATH:=$(CURRENT_PATH)/.. +RIFFA_HDL_PATH:=$(RIFFA_ROOT_PATH)/$(CURRENT_DIR)/riffa_hdl +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL := all +VENDORS:= altera xilinx SUBDIRS = $(VENDORS) all classic: $(VENDORS) -ultrascale: - $(MAKE) -C xilinx $(MAKECMDGOALS) RIFFA_PATH=$(RIFFA_PATH) +ultrascale: check-hdl + $(MAKE) -C xilinx $(MAKECMDGOALS) RIFFA_HDL_PATH=$(RIFFA_HDL_PATH) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) -$(VENDORS):: - $(MAKE) -C $@ $(MAKECMDGOALS) RIFFA_PATH=$(RIFFA_PATH) +$(VENDORS):: check-hdl + $(MAKE) -C $@ $(MAKECMDGOALS) RIFFA_HDL_PATH=$(RIFFA_HDL_PATH) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) + +clean-release:check-release-src + rm -rf $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + +destination: $(RELEASE_SRC_PATH)/fpga + +$(RELEASE_SRC_PATH)/fpga: check-release-src + mkdir $@ + +release: check-release-src destination $(VENDORS) + cp -r $(CURRENT_PATH)/riffa_hdl $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + rm -r $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/riffa_hdl/riffa.mk + +.PHONY:clean $(SUBDIRS) clobber release -.PHONY:clean $(SUBDIRS) clobber clean clobber: $(VENDORS) rm -rf *~ *.jou *.log @@ -63,4 +80,3 @@ clean clobber: $(VENDORS) - diff --git a/fpga/altera/Makefile b/fpga/altera/Makefile index c262083..3fa5722 100644 --- a/fpga/altera/Makefile +++ b/fpga/altera/Makefile @@ -41,14 +41,20 @@ VENDOR:=altera BOARDS:=de5 de4 de2i c4dev CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) -RIFFA_PATH=$(CURRENT_PATH)/../riffa_hdl +.DEFAULT_GOAL := all + +RIFFA_ROOT_PATH=$(CURRENT_PATH)/../../ +RIFFA_HDL_PATH=$(CURRENT_PATH)/../riffa_hdl +include $(RIFFA_ROOT_PATH)/release.mk +include $(RIFFA_ROOT_PATH)/fpga/fpga.mk all classic $(VENDOR): $(BOARDS) -$(BOARDS):: - $(MAKE) -C $@ $(MAKECMDGOALS) RIFFA_PATH=$(RIFFA_PATH) VENDOR_PATH=$(CURRENT_PATH) +$(BOARDS):: check-hdl + $(MAKE) -C $@ $(MAKECMDGOALS) VENDOR_PATH=$(CURRENT_PATH) VENDOR=$(VENDOR) .PHONY:clean $(BOARDS) classic all clobber clean clobber: $(VENDOR) rm -rf *~ .qsys_edit + diff --git a/fpga/altera/c4dev/C4DevGen1x4If64/Makefile b/fpga/altera/c4dev/C4DevGen1x4If64/Makefile index 2d150ca..39be211 100644 --- a/fpga/altera/c4dev/C4DevGen1x4If64/Makefile +++ b/fpga/altera/c4dev/C4DevGen1x4If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/ALTGXPCIeGen1x4.qip ip/ALTPLL50I50O125O250O.qip ip/PCIeGen1x4If64.qip diff --git a/fpga/altera/c4dev/Makefile b/fpga/altera/c4dev/Makefile index 787e400..566f905 100644 --- a/fpga/altera/c4dev/Makefile +++ b/fpga/altera/c4dev/Makefile @@ -42,5 +42,5 @@ BOARD=c4dev BOARD_PROJECTS:=C4DevGen1x4If64 BOARD_TYPE:=classic -BOARD_VENDOR:=altera +VENDOR:=altera include ../vendor.mk diff --git a/fpga/altera/c4dev/board.mk b/fpga/altera/c4dev/board.mk index 9ec47e9..becba70 100644 --- a/fpga/altera/c4dev/board.mk +++ b/fpga/altera/c4dev/board.mk @@ -38,20 +38,31 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v -# These rules impact PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) +PROJECT_BIT:= bit/$(PROJECT).sof +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).sdc PROJECT_FILE=prj/$(PROJECT).qsf prj/$(PROJECT).qpf PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP:=$(PROJECT_IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).sof +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).sof: $(PROJECT_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) quartus_sh --flow compile prj/$(PROJECT).qpf synthesis: bit/$(PROJECT).map.rpt @@ -73,4 +84,22 @@ clean: rm -rf *~ clobber: - rm -rf bit/*.sof + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/altera/de2i/DE2Gen1x1If64/Makefile b/fpga/altera/de2i/DE2Gen1x1If64/Makefile index c53fb9b..f7edec8 100644 --- a/fpga/altera/de2i/DE2Gen1x1If64/Makefile +++ b/fpga/altera/de2i/DE2Gen1x1If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/ALTGXPCIeGen1x1.qip ip/ALTPLL50I50O125O250O.qip ip/PCIeGen1x1If64.qip diff --git a/fpga/altera/de2i/Makefile b/fpga/altera/de2i/Makefile index da90d15..5229899 100644 --- a/fpga/altera/de2i/Makefile +++ b/fpga/altera/de2i/Makefile @@ -42,5 +42,5 @@ BOARD=de2i BOARD_PROJECTS:= DE2Gen1x1If64 BOARD_TYPE:=classic -BOARD_VENDOR:=altera +VENDOR:=altera include ../vendor.mk diff --git a/fpga/altera/de2i/board.mk b/fpga/altera/de2i/board.mk index 9ec47e9..becba70 100644 --- a/fpga/altera/de2i/board.mk +++ b/fpga/altera/de2i/board.mk @@ -38,20 +38,31 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v -# These rules impact PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) +PROJECT_BIT:= bit/$(PROJECT).sof +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).sdc PROJECT_FILE=prj/$(PROJECT).qsf prj/$(PROJECT).qpf PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP:=$(PROJECT_IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).sof +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).sof: $(PROJECT_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) quartus_sh --flow compile prj/$(PROJECT).qpf synthesis: bit/$(PROJECT).map.rpt @@ -73,4 +84,22 @@ clean: rm -rf *~ clobber: - rm -rf bit/*.sof + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/altera/de4/DE4Gen1x8If64/Makefile b/fpga/altera/de4/DE4Gen1x8If64/Makefile index 930b068..77e235e 100644 --- a/fpga/altera/de4/DE4Gen1x8If64/Makefile +++ b/fpga/altera/de4/DE4Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/ALTGXPCIeGen1x8.qip ip/ALTPLL50I50O125O250O.qip ip/PCIeGen1x8If64.qip diff --git a/fpga/altera/de4/DE4Gen2x8If128/Makefile b/fpga/altera/de4/DE4Gen2x8If128/Makefile index d96b13a..1f4c099 100644 --- a/fpga/altera/de4/DE4Gen2x8If128/Makefile +++ b/fpga/altera/de4/DE4Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/ALTGXPCIeGen2x8.qip ip/ALTPLL50I50O125O250O.qip ip/PCIeGen2x8If128.qip diff --git a/fpga/altera/de4/Makefile b/fpga/altera/de4/Makefile index 6aeda50..ce97538 100644 --- a/fpga/altera/de4/Makefile +++ b/fpga/altera/de4/Makefile @@ -42,5 +42,5 @@ BOARD=de4 BOARD_PROJECTS:= DE4Gen1x8If64 DE4Gen2x8If128 BOARD_TYPE:=classic -BOARD_VENDOR:=altera +VENDOR:=altera include ../vendor.mk diff --git a/fpga/altera/de4/board.mk b/fpga/altera/de4/board.mk index 9ec47e9..becba70 100644 --- a/fpga/altera/de4/board.mk +++ b/fpga/altera/de4/board.mk @@ -38,20 +38,31 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v -# These rules impact PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) +PROJECT_BIT:= bit/$(PROJECT).sof +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).sdc PROJECT_FILE=prj/$(PROJECT).qsf prj/$(PROJECT).qpf PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP:=$(PROJECT_IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).sof +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).sof: $(PROJECT_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) quartus_sh --flow compile prj/$(PROJECT).qpf synthesis: bit/$(PROJECT).map.rpt @@ -73,4 +84,22 @@ clean: rm -rf *~ clobber: - rm -rf bit/*.sof + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/altera/de5/DE5Gen1x8If64/Makefile b/fpga/altera/de5/DE5Gen1x8If64/Makefile index d4ff8d3..415c109 100644 --- a/fpga/altera/de5/DE5Gen1x8If64/Makefile +++ b/fpga/altera/de5/DE5Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/XCVRCtrlGen1x8.sip ip/XCVRCtrlGen1x8.qip ip/PCIeGen1x8If64.sip ip/PCIeGen1x8If64.qip diff --git a/fpga/altera/de5/DE5Gen2x8If128/Makefile b/fpga/altera/de5/DE5Gen2x8If128/Makefile index 6b2e213..c9d1899 100644 --- a/fpga/altera/de5/DE5Gen2x8If128/Makefile +++ b/fpga/altera/de5/DE5Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/XCVRCtrlGen2x8.sip ip/XCVRCtrlGen2x8.qip ip/PCIeGen2x8If128.sip ip/PCIeGen2x8If128.qip diff --git a/fpga/altera/de5/DE5Gen3x4If128/Makefile b/fpga/altera/de5/DE5Gen3x4If128/Makefile index d7388ee..f18440c 100644 --- a/fpga/altera/de5/DE5Gen3x4If128/Makefile +++ b/fpga/altera/de5/DE5Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk PROJECT_IP+=ip/XCVRCtrlGen3x4.sip ip/XCVRCtrlGen3x4.qip ip/PCIeGen3x4If128.sip ip/PCIeGen3x4If128.qip diff --git a/fpga/altera/de5/DE5QGen1x8If64/Makefile b/fpga/altera/de5/DE5QGen1x8If64/Makefile index be15549..c7c66f2 100644 --- a/fpga/altera/de5/DE5QGen1x8If64/Makefile +++ b/fpga/altera/de5/DE5QGen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,8 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=QSysDE5QGen1x8If64.qsys +PROJECT_IP+=ip/QSysDE5QGen1x8If64.qsys +RELEASE_IP+=ip/QSysDE5QGen1x8If64.qsys diff --git a/fpga/altera/de5/DE5QGen2x8If128/Makefile b/fpga/altera/de5/DE5QGen2x8If128/Makefile index 125fd09..ef4dbc6 100644 --- a/fpga/altera/de5/DE5QGen2x8If128/Makefile +++ b/fpga/altera/de5/DE5QGen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,8 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=QSysDE5QGen2x8If128.qsys +PROJECT_IP+=ip/QSysDE5QGen2x8If128.qsys +RELEASE_IP+=ip/QSysDE5QGen2x8If128.qsys diff --git a/fpga/altera/de5/DE5QGen3x4If128/Makefile b/fpga/altera/de5/DE5QGen3x4If128/Makefile index f12937f..ee68e13 100644 --- a/fpga/altera/de5/DE5QGen3x4If128/Makefile +++ b/fpga/altera/de5/DE5QGen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,8 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=QSysDE5QGen3x4If128.qsys +PROJECT_IP+=ip/QSysDE5QGen3x4If128.qsys +RELEASE_IP+=ip/QSysDE5QGen3x4If128.qsys diff --git a/fpga/altera/de5/Makefile b/fpga/altera/de5/Makefile index bca44c2..3790f4c 100644 --- a/fpga/altera/de5/Makefile +++ b/fpga/altera/de5/Makefile @@ -42,5 +42,5 @@ BOARD=de5 BOARD_PROJECTS:= DE5QGen1x8If64 DE5QGen2x8If128 DE5QGen3x4If128 DE5Gen1x8If64 DE5Gen2x8If128 DE5Gen3x4If128 BOARD_TYPE:=classic -BOARD_VENDOR:=altera +VENDOR:=altera include ../vendor.mk diff --git a/fpga/altera/de5/board.mk b/fpga/altera/de5/board.mk index f7fe456..becba70 100644 --- a/fpga/altera/de5/board.mk +++ b/fpga/altera/de5/board.mk @@ -38,19 +38,31 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) +PROJECT_BIT:= bit/$(PROJECT).sof +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).sdc PROJECT_FILE=prj/$(PROJECT).qsf prj/$(PROJECT).qpf PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP:=$(PROJECT_IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).sof +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).sof: $(PROJECT_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) quartus_sh --flow compile prj/$(PROJECT).qpf synthesis: bit/$(PROJECT).map.rpt @@ -72,4 +84,22 @@ clean: rm -rf *~ clobber: - rm -rf bit/*.sof + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/altera/vendor.mk b/fpga/altera/vendor.mk index 641027e..1e89a8c 100644 --- a/fpga/altera/vendor.mk +++ b/fpga/altera/vendor.mk @@ -40,12 +40,26 @@ #----------------------------------------------------------------------- BOARD_PATH:=$(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))/$(BOARD) BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v +RIFFA_ROOT_PATH:=$(BOARD_PATH)/../../../ +RIFFA_HDL_PATH:=$(BOARD_PATH)/../../riffa_hdl +include $(RIFFA_ROOT_PATH)/release.mk + +RELEASE_BOARD_PATH=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD) SUBDIRS = $(BOARD_PROJECTS) +.DEFAULT_GOAL:= all .PHONY:clean clobber $(SUBDIRS) all $(BOARD_VENDOR) $(BOARD) $(BOARD_TYPE) all $(BOARD_VENDOR) $(BOARD) $(BOARD_TYPE): $(SUBDIRS) $(SUBDIRS):: - $(MAKE) -C $@ $(MAKECMDGOALS) BOARD=$(BOARD) TYPE=$(BOARD_TYPE) VENDOR=$(BOARD_VENDOR) BOARD_HDL=$(BOARD_HDL) + $(MAKE) -C $@ $(MAKECMDGOALS) BOARD=$(BOARD) TYPE=$(BOARD_TYPE) VENDOR=$(VENDOR) BOARD_HDL=$(BOARD_HDL) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) clean clobber: $(SUBDIRS) rm -rf *~ + +release: destination $(SUBDIRS) + +destination: $(RELEASE_BOARD_PATH) +$(RELEASE_BOARD_PATH): check-release-src + mkdir $@ + cp $(BOARD_HDL) $(RELEASE_BOARD_PATH) + diff --git a/fpga/fpga.mk b/fpga/fpga.mk new file mode 100644 index 0000000..1d7afcf --- /dev/null +++ b/fpga/fpga.mk @@ -0,0 +1,7 @@ +RELEASE_VENDOR_PATH=$(RELEASE_SRC_PATH)/fpga/$(VENDOR) + +destination: $(RELEASE_VENDOR_PATH) +$(RELEASE_VENDOR_PATH): check-release-src + mkdir $@ + +release: destination $(BOARDS) diff --git a/fpga/xilinx/Makefile b/fpga/xilinx/Makefile index b2ae7da..891bd65 100644 --- a/fpga/xilinx/Makefile +++ b/fpga/xilinx/Makefile @@ -43,7 +43,12 @@ ULTRASCALE:=NetFPGA adm7V3 kcu105 vc709 vcu108 CLASSIC:=ac701 kc705 vc707 zc706 BOARDS:=$(CLASSIC) $(ULTRASCALE) CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) -RIFFA_PATH=$(CURRENT_PATH)/../riffa_hdl +.DEFAULT_GOAL=all + +RIFFA_ROOT_PATH=$(CURRENT_PATH)/../../ +RIFFA_HDL_PATH=$(CURRENT_PATH)/../riffa_hdl +include $(RIFFA_ROOT_PATH)/release.mk +include $(RIFFA_ROOT_PATH)/fpga/fpga.mk all $(VENDOR): $(BOARDS) @@ -51,7 +56,7 @@ classic:$(CLASSIC) ultrascale:$(ULTRASCALE) $(CLASSIC) $(ULTRASCALE):: - $(MAKE) -C $@ $(MAKECMDGOALS) RIFFA_PATH=$(RIFFA_PATH) VENDOR_PATH=$(CURRENT_PATH) + $(MAKE) -C $@ $(MAKECMDGOALS) VENDOR_PATH=$(CURRENT_PATH) VENDOR=$(VENDOR) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) .PHONY:clean $(BOARDS) classic all clobber clean clobber: $(BOARDS) diff --git a/fpga/xilinx/NetFPGA/Makefile b/fpga/xilinx/NetFPGA/Makefile index 37218d1..cd44686 100644 --- a/fpga/xilinx/NetFPGA/Makefile +++ b/fpga/xilinx/NetFPGA/Makefile @@ -42,5 +42,5 @@ BOARD:=NetFPGA BOARD_PROJECTS:=NetFPGA_Gen1x8If64 NetFPGA_Gen2x8If128 NetFPGA_Gen3x4If128 BOARD_TYPE:=ultrascale -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/NetFPGA/NetFPGA_Gen1x8If64/Makefile b/fpga/xilinx/NetFPGA/NetFPGA_Gen1x8If64/Makefile index 165ad8a..795546b 100644 --- a/fpga/xilinx/NetFPGA/NetFPGA_Gen1x8If64/Makefile +++ b/fpga/xilinx/NetFPGA/NetFPGA_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/NetFPGA/NetFPGA_Gen2x8If128/Makefile b/fpga/xilinx/NetFPGA/NetFPGA_Gen2x8If128/Makefile index d3f735e..d760cff 100644 --- a/fpga/xilinx/NetFPGA/NetFPGA_Gen2x8If128/Makefile +++ b/fpga/xilinx/NetFPGA/NetFPGA_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/NetFPGA/NetFPGA_Gen3x4If128/Makefile b/fpga/xilinx/NetFPGA/NetFPGA_Gen3x4If128/Makefile index 69fe1b7..5ddddf7 100644 --- a/fpga/xilinx/NetFPGA/NetFPGA_Gen3x4If128/Makefile +++ b/fpga/xilinx/NetFPGA/NetFPGA_Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen3x4If128.xci +PROJECT_IP+=ip/PCIeGen3x4If128.xci diff --git a/fpga/xilinx/NetFPGA/board.mk b/fpga/xilinx/NetFPGA/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/NetFPGA/board.mk +++ b/fpga/xilinx/NetFPGA/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/ac701/AC701_Gen1x4If64/Makefile b/fpga/xilinx/ac701/AC701_Gen1x4If64/Makefile index 12ded21..13bb346 100644 --- a/fpga/xilinx/ac701/AC701_Gen1x4If64/Makefile +++ b/fpga/xilinx/ac701/AC701_Gen1x4If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x4If64.xci +PROJECT_IP+=ip/PCIeGen1x4If64.xci diff --git a/fpga/xilinx/ac701/AC701_Gen2x4If128/Makefile b/fpga/xilinx/ac701/AC701_Gen2x4If128/Makefile index 00a4656..7a01b69 100644 --- a/fpga/xilinx/ac701/AC701_Gen2x4If128/Makefile +++ b/fpga/xilinx/ac701/AC701_Gen2x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x4If64.xci +PROJECT_IP+=ip/PCIeGen2x4If128.xci diff --git a/fpga/xilinx/ac701/Makefile b/fpga/xilinx/ac701/Makefile index 9f0c986..5eb20e5 100644 --- a/fpga/xilinx/ac701/Makefile +++ b/fpga/xilinx/ac701/Makefile @@ -42,5 +42,5 @@ BOARD:=ac701 BOARD_PROJECTS:=AC701_Gen1x4If64 AC701_Gen2x4If128 BOARD_TYPE:=classic -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/ac701/board.mk b/fpga/xilinx/ac701/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/ac701/board.mk +++ b/fpga/xilinx/ac701/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/adm7V3/ADM7V3_Gen1x8If64/Makefile b/fpga/xilinx/adm7V3/ADM7V3_Gen1x8If64/Makefile index 165ad8a..795546b 100644 --- a/fpga/xilinx/adm7V3/ADM7V3_Gen1x8If64/Makefile +++ b/fpga/xilinx/adm7V3/ADM7V3_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/adm7V3/ADM7V3_Gen2x8If128/Makefile b/fpga/xilinx/adm7V3/ADM7V3_Gen2x8If128/Makefile index d3f735e..d760cff 100644 --- a/fpga/xilinx/adm7V3/ADM7V3_Gen2x8If128/Makefile +++ b/fpga/xilinx/adm7V3/ADM7V3_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/adm7V3/ADM7V3_Gen3x4If128/Makefile b/fpga/xilinx/adm7V3/ADM7V3_Gen3x4If128/Makefile index 69fe1b7..5ddddf7 100644 --- a/fpga/xilinx/adm7V3/ADM7V3_Gen3x4If128/Makefile +++ b/fpga/xilinx/adm7V3/ADM7V3_Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen3x4If128.xci +PROJECT_IP+=ip/PCIeGen3x4If128.xci diff --git a/fpga/xilinx/adm7V3/Makefile b/fpga/xilinx/adm7V3/Makefile index ee11d3c..b30bed8 100644 --- a/fpga/xilinx/adm7V3/Makefile +++ b/fpga/xilinx/adm7V3/Makefile @@ -42,5 +42,5 @@ BOARD:=adm7V3 BOARD_PROJECTS:=ADM7V3_Gen1x8If64 ADM7V3_Gen2x8If128 ADM7V3_Gen3x4If128 BOARD_TYPE:=ultrascale -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/adm7V3/board.mk b/fpga/xilinx/adm7V3/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/adm7V3/board.mk +++ b/fpga/xilinx/adm7V3/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/kc705/KC705_Gen1x8If64/Makefile b/fpga/xilinx/kc705/KC705_Gen1x8If64/Makefile index f5daa54..cca414a 100644 --- a/fpga/xilinx/kc705/KC705_Gen1x8If64/Makefile +++ b/fpga/xilinx/kc705/KC705_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/kc705/KC705_Gen2x8If128/Makefile b/fpga/xilinx/kc705/KC705_Gen2x8If128/Makefile index 05aa655..459945d 100644 --- a/fpga/xilinx/kc705/KC705_Gen2x8If128/Makefile +++ b/fpga/xilinx/kc705/KC705_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/kc705/Makefile b/fpga/xilinx/kc705/Makefile index bf0704d..7458ee7 100644 --- a/fpga/xilinx/kc705/Makefile +++ b/fpga/xilinx/kc705/Makefile @@ -42,5 +42,5 @@ BOARD:=kc705 BOARD_PROJECTS:=KC705_Gen1x8If64 KC705_Gen2x8If128 BOARD_TYPE:=classic -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/kc705/board.mk b/fpga/xilinx/kc705/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/kc705/board.mk +++ b/fpga/xilinx/kc705/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/kcu105/KCU105_Gen1x8If64/Makefile b/fpga/xilinx/kcu105/KCU105_Gen1x8If64/Makefile index 165ad8a..795546b 100644 --- a/fpga/xilinx/kcu105/KCU105_Gen1x8If64/Makefile +++ b/fpga/xilinx/kcu105/KCU105_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/kcu105/KCU105_Gen2x8If128/Makefile b/fpga/xilinx/kcu105/KCU105_Gen2x8If128/Makefile index d3f735e..d760cff 100644 --- a/fpga/xilinx/kcu105/KCU105_Gen2x8If128/Makefile +++ b/fpga/xilinx/kcu105/KCU105_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/kcu105/KCU105_Gen3x4If128/Makefile b/fpga/xilinx/kcu105/KCU105_Gen3x4If128/Makefile index 69fe1b7..5ddddf7 100644 --- a/fpga/xilinx/kcu105/KCU105_Gen3x4If128/Makefile +++ b/fpga/xilinx/kcu105/KCU105_Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen3x4If128.xci +PROJECT_IP+=ip/PCIeGen3x4If128.xci diff --git a/fpga/xilinx/kcu105/Makefile b/fpga/xilinx/kcu105/Makefile index ae99406..337451c 100644 --- a/fpga/xilinx/kcu105/Makefile +++ b/fpga/xilinx/kcu105/Makefile @@ -42,5 +42,5 @@ BOARD:=kcu105 BOARD_PROJECTS:=KCU105_Gen1x8If64 KCU105_Gen2x8If128 KCU105_Gen3x4If128 BOARD_TYPE:=ultrascale -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/kcu105/board.mk b/fpga/xilinx/kcu105/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/kcu105/board.mk +++ b/fpga/xilinx/kcu105/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/vc707/Makefile b/fpga/xilinx/vc707/Makefile index 25d59e7..62853ce 100644 --- a/fpga/xilinx/vc707/Makefile +++ b/fpga/xilinx/vc707/Makefile @@ -42,5 +42,5 @@ BOARD:=vc707 BOARD_PROJECTS:=VC707_Gen1x8If64 VC707_Gen2x8If128 BOARD_TYPE:=classic -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/vc707/VC707_Gen1x8If64/Makefile b/fpga/xilinx/vc707/VC707_Gen1x8If64/Makefile index f5daa54..cca414a 100644 --- a/fpga/xilinx/vc707/VC707_Gen1x8If64/Makefile +++ b/fpga/xilinx/vc707/VC707_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/vc707/VC707_Gen2x8If128/Makefile b/fpga/xilinx/vc707/VC707_Gen2x8If128/Makefile index 05aa655..459945d 100644 --- a/fpga/xilinx/vc707/VC707_Gen2x8If128/Makefile +++ b/fpga/xilinx/vc707/VC707_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/vc707/board.mk b/fpga/xilinx/vc707/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/vc707/board.mk +++ b/fpga/xilinx/vc707/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/vc709/Makefile b/fpga/xilinx/vc709/Makefile index 8b44b81..c1fc1b0 100644 --- a/fpga/xilinx/vc709/Makefile +++ b/fpga/xilinx/vc709/Makefile @@ -42,5 +42,5 @@ BOARD:=vc709 BOARD_PROJECTS:=VC709_Gen1x8If64 VC709_Gen2x8If128 VC709_Gen3x4If128 BOARD_TYPE:=ultrascale -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/vc709/VC709_Gen1x8If64/Makefile b/fpga/xilinx/vc709/VC709_Gen1x8If64/Makefile index 165ad8a..795546b 100644 --- a/fpga/xilinx/vc709/VC709_Gen1x8If64/Makefile +++ b/fpga/xilinx/vc709/VC709_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/vc709/VC709_Gen2x8If128/Makefile b/fpga/xilinx/vc709/VC709_Gen2x8If128/Makefile index d3f735e..d760cff 100644 --- a/fpga/xilinx/vc709/VC709_Gen2x8If128/Makefile +++ b/fpga/xilinx/vc709/VC709_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/vc709/VC709_Gen3x4If128/Makefile b/fpga/xilinx/vc709/VC709_Gen3x4If128/Makefile index 69fe1b7..5ddddf7 100644 --- a/fpga/xilinx/vc709/VC709_Gen3x4If128/Makefile +++ b/fpga/xilinx/vc709/VC709_Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen3x4If128.xci +PROJECT_IP+=ip/PCIeGen3x4If128.xci diff --git a/fpga/xilinx/vc709/board.mk b/fpga/xilinx/vc709/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/vc709/board.mk +++ b/fpga/xilinx/vc709/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/vcu108/Makefile b/fpga/xilinx/vcu108/Makefile index 47b476c..5306be7 100644 --- a/fpga/xilinx/vcu108/Makefile +++ b/fpga/xilinx/vcu108/Makefile @@ -42,5 +42,5 @@ BOARD:=vcu108 BOARD_PROJECTS:=VCU108_Gen1x8If64 VCU108_Gen2x8If128 VCU108_Gen3x4If128 BOARD_TYPE:=ultrascale -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/vcu108/VCU108_Gen1x8If64/Makefile b/fpga/xilinx/vcu108/VCU108_Gen1x8If64/Makefile index 165ad8a..795546b 100644 --- a/fpga/xilinx/vcu108/VCU108_Gen1x8If64/Makefile +++ b/fpga/xilinx/vcu108/VCU108_Gen1x8If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x8If64.xci +PROJECT_IP+=ip/PCIeGen1x8If64.xci diff --git a/fpga/xilinx/vcu108/VCU108_Gen2x8If128/Makefile b/fpga/xilinx/vcu108/VCU108_Gen2x8If128/Makefile index d3f735e..d760cff 100644 --- a/fpga/xilinx/vcu108/VCU108_Gen2x8If128/Makefile +++ b/fpga/xilinx/vcu108/VCU108_Gen2x8If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x8If128.xci +PROJECT_IP+=ip/PCIeGen2x8If128.xci diff --git a/fpga/xilinx/vcu108/VCU108_Gen3x4If128/Makefile b/fpga/xilinx/vcu108/VCU108_Gen3x4If128/Makefile index 69fe1b7..5ddddf7 100644 --- a/fpga/xilinx/vcu108/VCU108_Gen3x4If128/Makefile +++ b/fpga/xilinx/vcu108/VCU108_Gen3x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=ultrascale CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen3x4If128.xci +PROJECT_IP+=ip/PCIeGen3x4If128.xci diff --git a/fpga/xilinx/vcu108/board.mk b/fpga/xilinx/vcu108/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/vcu108/board.mk +++ b/fpga/xilinx/vcu108/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/fpga/xilinx/vendor.mk b/fpga/xilinx/vendor.mk index 0cd502c..054f256 100644 --- a/fpga/xilinx/vendor.mk +++ b/fpga/xilinx/vendor.mk @@ -38,15 +38,29 @@ # Description: Vendor-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- + BOARD_PATH:=$(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))/$(BOARD) BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v -SUBDIRS = $(BOARD_PROJECTS) +RIFFA_ROOT_PATH:=$(BOARD_PATH)/../../../ +RIFFA_HDL_PATH:=$(BOARD_PATH)/../../riffa_hdl +include $(RIFFA_ROOT_PATH)/release.mk -.PHONY:clean clobber $(SUBDIRS) all $(BOARD_VENDOR) $(BOARD) $(BOARD_TYPE) -all $(BOARD_VENDOR) $(BOARD) $(BOARD_TYPE): $(SUBDIRS) +RELEASE_BOARD_PATH=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD) +SUBDIRS = $(BOARD_PROJECTS) +.DEFAULT_GOAL=all + +.PHONY:clean clobber $(SUBDIRS) all $(VENDOR) $(BOARD) $(BOARD_TYPE) +all $(VENDOR) $(BOARD) $(BOARD_TYPE): $(SUBDIRS) $(SUBDIRS):: - $(MAKE) -C $@ $(MAKECMDGOALS) BOARD=$(BOARD) TYPE=$(BOARD_TYPE) VENDOR=$(BOARD_VENDOR) BOARD_HDL=$(BOARD_HDL) - + $(MAKE) -C $@ $(MAKECMDGOALS) BOARD=$(BOARD) TYPE=$(BOARD_TYPE) VENDOR=$(VENDOR) BOARD_HDL=$(BOARD_HDL) RIFFA_ROOT_PATH=$(RIFFA_ROOT_PATH) clean clobber: $(SUBDIRS) - rm -rf *.log *.jou .Xil *~ + rm -rf *~ + +release: destination $(SUBDIRS) + +destination: $(RELEASE_BOARD_PATH) +$(RELEASE_BOARD_PATH): check-release-src + mkdir $@ + cp $(BOARD_HDL) $(RELEASE_BOARD_PATH) + diff --git a/fpga/xilinx/zc706/Makefile b/fpga/xilinx/zc706/Makefile index f6dfdde..1f755e3 100644 --- a/fpga/xilinx/zc706/Makefile +++ b/fpga/xilinx/zc706/Makefile @@ -42,5 +42,5 @@ BOARD:=zc706 BOARD_PROJECTS:=ZC706_Gen1x4If64 ZC706_Gen2x4If128 BOARD_TYPE:=classic -BOARD_VENDOR:=xilinx +VENDOR:=xilinx include ../vendor.mk diff --git a/fpga/xilinx/zc706/ZC706_Gen1x4If64/Makefile b/fpga/xilinx/zc706/ZC706_Gen1x4If64/Makefile index 12ded21..13bb346 100644 --- a/fpga/xilinx/zc706/ZC706_Gen1x4If64/Makefile +++ b/fpga/xilinx/zc706/ZC706_Gen1x4If64/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=64 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen1x4If64.xci +PROJECT_IP+=ip/PCIeGen1x4If64.xci diff --git a/fpga/xilinx/zc706/ZC706_Gen2x4If128/Makefile b/fpga/xilinx/zc706/ZC706_Gen2x4If128/Makefile index bf2289c..7a01b69 100644 --- a/fpga/xilinx/zc706/ZC706_Gen2x4If128/Makefile +++ b/fpga/xilinx/zc706/ZC706_Gen2x4If128/Makefile @@ -39,7 +39,7 @@ # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- # This make file expects the following variables to be set: -# RIFFA_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. +# RIFFA_HDL_PATH -- Path to the riffa_hdl directory in the corresponding RIFFA directory. # BOARD_PATH -- Path to the $(BOARD) directory, the board this project corresponds to # BOARD_HDL -- A list of an board-specific HDL files not in the riffa_hdl directory WIDTH=128 @@ -47,8 +47,8 @@ TYPE=classic CURRENT_PATH := $(notdir $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST)))))) PROJECT=$(shell basename $(CURRENT_PATH)) -ifndef RIFFA_PATH - RIFFA_PATH:=../../../riffa_hdl +ifndef RIFFA_HDL_PATH + RIFFA_HDL_PATH:=../../../riffa_hdl endif ifndef BOARD_PATH BOARD_PATH:=.. @@ -56,7 +56,7 @@ endif ifndef JOBS JOBS=1 endif -include $(RIFFA_PATH)/riffa.mk +include $(RIFFA_HDL_PATH)/riffa.mk include $(BOARD_PATH)/board.mk -PROJECT_IP+=PCIeGen2x4If128.xci +PROJECT_IP+=ip/PCIeGen2x4If128.xci diff --git a/fpga/xilinx/zc706/board.mk b/fpga/xilinx/zc706/board.mk index c189d14..0d6b7bf 100644 --- a/fpga/xilinx/zc706/board.mk +++ b/fpga/xilinx/zc706/board.mk @@ -38,28 +38,40 @@ # Description: Board-specific include makefile # Author: Dustin Richmond (@darichmond) #----------------------------------------------------------------------- +include $(RIFFA_ROOT_PATH)/release.mk +.DEFAULT_GOAL=all + BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v PROJECT_IP= -PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES) +PROJECT_BIT:= bit/$(PROJECT).bit +PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_HDL_PATH)/%,$(RIFFA_HDL)) PROJECT_CONSTR=constr/$(PROJECT).xdc PROJECT_FILE=prj/$(PROJECT).xpr PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL) +RELEASE_BIT:=$(PROJECT_BIT) +RELEASE_IP=$(PROJECT_IP) # Note the difference between this and the other assignments (Projects add their own IP) +RELEASE_HDL:=hdl/$(PROJECT).v +RELEASE_CONSTR:=$(PROJECT_CONSTR) +RELEASE_FILE:=$(PROJECT_FILE) +RELEASE_PROJECT_PATH:=$(RELEASE_SRC_PATH)/fpga/$(VENDOR)/$(BOARD)/$(PROJECT) +copy-files = $(foreach file, $1, cp $(file) $2;) + .PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD) -$(PROJECT): bit/$(PROJECT).bit +$(PROJECT): $(PROJECT_BIT) @echo Compiling Project $@ -bit/$(PROJECT).bit: $($(PROJECT)_FILES) +$(PROJECT_BIT): $(PROJECT_FILES) echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/ synthesis: prj/$(PROJECT).runs/synth_1 -prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/synth_1: $(PROJECT_FILES) echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr implementation:prj/$(PROJECT).runs/impl_1 -prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES) +prj/$(PROJECT).runs/impl_1: $(PROJECT_FILES) echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT) @@ -70,4 +82,22 @@ clean: rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~ clobber: - rm -rf bit/*.bit + rm -rf $(PROJECT_BIT) + +destination: $(RELEASE_PROJECT_PATH) + mkdir $(RELEASE_PROJECT_PATH)/bit + mkdir $(RELEASE_PROJECT_PATH)/constr + mkdir $(RELEASE_PROJECT_PATH)/ip + mkdir $(RELEASE_PROJECT_PATH)/hdl + mkdir $(RELEASE_PROJECT_PATH)/prj + +$(RELEASE_PROJECT_PATH): check-release-src + mkdir $@ + +release:check-release-src destination + $(call copy-files, $(RELEASE_BIT), $(RELEASE_PROJECT_PATH)/bit) + $(call copy-files, $(RELEASE_CONSTR), $(RELEASE_PROJECT_PATH)/constr) + $(call copy-files, $(RELEASE_IP), $(RELEASE_PROJECT_PATH)/ip) + $(call copy-files, $(RELEASE_HDL), $(RELEASE_PROJECT_PATH)/hdl) + $(call copy-files, $(RELEASE_FILE), $(RELEASE_PROJECT_PATH)/prj) + diff --git a/java/Makefile b/java/Makefile new file mode 100644 index 0000000..8986ac6 --- /dev/null +++ b/java/Makefile @@ -0,0 +1,57 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the java subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH and +# RIFFA_ROOT_PATH to be set by the parent Makefile +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) + +include $(RIFFA_ROOT_PATH)/release.mk + +release: check-release-src clean-release + cp -r $(CURRENT_PATH) $(RELEASE_SRC_PATH)/ + rm -r $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/Makefile + +clean-release: check-release-src + rm -rf $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + +clean: check + diff --git a/matlab/Makefile b/matlab/Makefile new file mode 100644 index 0000000..0a8c629 --- /dev/null +++ b/matlab/Makefile @@ -0,0 +1,57 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the matlab subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH and +# RIFFA_ROOT_PATH to be set by the parent Makefile +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) + +include $(RIFFA_ROOT_PATH)/release.mk + +release: check-release-src clean-release + cp -r $(CURRENT_PATH) $(RELEASE_SRC_PATH)/ + rm -r $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/Makefile + +clean-release: check-release-src + rm -rf $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + +clean: check + diff --git a/python/Makefile b/python/Makefile new file mode 100644 index 0000000..dcce840 --- /dev/null +++ b/python/Makefile @@ -0,0 +1,57 @@ +# ---------------------------------------------------------------------- +# Copyright (c) 2016, The Regents of the University of California All +# rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following +# disclaimer in the documentation and/or other materials provided +# with the distribution. +# +# * Neither the name of The Regents of the University of California +# nor the names of its contributors may be used to endorse or +# promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE +# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +# DAMAGE. +# ---------------------------------------------------------------------- +#----------------------------------------------------------------------- +# Filename: Makefile +# Version: 1.0 +# Description: Makefile for including the python subdirectory in +# a RIFFA release. Expects RELEASE_SRC_PATH and +# RIFFA_ROOT_PATH to be set by the parent Makefile +# Author: Dustin Richmond (@darichmond) +#----------------------------------------------------------------------- + +CURRENT_PATH := $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +CURRENT_DIR := $(shell basename $(CURRENT_PATH)) + +include $(RIFFA_ROOT_PATH)/release.mk + +release: check-release-src clean-release + cp -r $(CURRENT_PATH) $(RELEASE_SRC_PATH)/ + rm -r $(RELEASE_SRC_PATH)/$(CURRENT_DIR)/Makefile + +clean-release: check-release-src + rm -rf $(RELEASE_SRC_PATH)/$(CURRENT_DIR) + +clean: check + diff --git a/release.mk b/release.mk new file mode 100644 index 0000000..dde8834 --- /dev/null +++ b/release.mk @@ -0,0 +1,29 @@ +# Check that given variables are set and all have non-empty values, +# die with an error otherwise. +# +# Params: +# 1. Variable name(s) to test. +# 2. (optional) Error message to print. +check_defined = \ + $(foreach 1,$1,$(__check_defined)) +__check_defined = \ + $(if $(value $1),, \ + $(error Undefined $1$(if $(value 2), ($(strip $2))))) + +check-release: + $(call check_defined, RELEASE_PATH) + +check-release-src: + $(call check_defined, RELEASE_SRC_PATH) + +check-release-doc: + $(call check_defined, RELEASE_DOC_PATH) + +check-root: + $(call check_defined, RIFFA_ROOT_PATH) + +check-hdl: + $(call check_defined, RIFFA_HDL_PATH) + + +