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Removing signal tap declaration from DE4 project
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@ -275,7 +275,4 @@ set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_extender.v
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set_global_assignment -name QIP_FILE ../ip/ALTGXPCIeGen2x8.qip
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set_global_assignment -name QIP_FILE ../ip/ALTGXPCIeGen2x8.qip
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set_global_assignment -name QIP_FILE ../ip/ALTPLL50I50O125O250O.qip
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set_global_assignment -name QIP_FILE ../ip/ALTPLL50I50O125O250O.qip
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set_global_assignment -name QIP_FILE ../ip/PCIeGen2x8If128.qip
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set_global_assignment -name QIP_FILE ../ip/PCIeGen2x8If128.qip
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE ../stp/stp1.stp
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set_global_assignment -name SIGNALTAP_FILE ../stp/stp1.stp
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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