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Removing signal tap declaration from DE4 project

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This commit is contained in:
Dustin Richmond 2016-08-11 14:18:13 -07:00
parent b8398e09cf
commit 8384618b36
1 changed files with 0 additions and 3 deletions
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fpga/altera/de4/DE4Gen2x8If128/prj/DE4Gen2x8If128.qsf
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@ -275,7 +275,4 @@ set_global_assignment -name VERILOG_FILE ../../../../riffa_hdl/reset_extender.v
set_global_assignment -name QIP_FILE ../ip/ALTGXPCIeGen2x8.qip
set_global_assignment -name QIP_FILE ../ip/ALTPLL50I50O125O250O.qip
set_global_assignment -name QIP_FILE ../ip/PCIeGen2x8If128.qip
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE ../stp/stp1.stp
set_global_assignment -name SIGNALTAP_FILE ../stp/stp1.stp
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top