FPGA/riffa
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Merge pull request #6 from jrobrien/py3k-x64

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Add support for 64 bit pointers and Python 3
This commit is contained in:
Dustin Richmond 2016-05-09 16:27:23 -07:00
commit af7c5928f2
1 changed files with 4 additions and 1 deletions
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python/riffa.py
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@ -48,6 +48,9 @@ if platform.system() == "Linux":
else: else:
libriffa = ctypes.CDLL("riffa.dll") libriffa = ctypes.CDLL("riffa.dll")
libriffa.fpga_recv.argtypes = [ctypes.c_void_p, ctypes.c_int, ctypes.c_void_p, ctypes.c_int, ctypes.c_longlong]
libriffa.fpga_send.argtypes = [ctypes.c_void_p, ctypes.c_int, ctypes.c_void_p, ctypes.c_int, ctypes.c_int, ctypes.c_int, ctypes.c_longlong]
class FpgaInfoList(ctypes.Structure): class FpgaInfoList(ctypes.Structure):
_fields_ = [("num_fpgas", ctypes.c_int), _fields_ = [("num_fpgas", ctypes.c_int),
("id", ctypes.c_int * NUM_FPGAS), ("id", ctypes.c_int * NUM_FPGAS),
@ -156,7 +159,7 @@ def fpga_recv(fd, chnl, data, timeout):
ctypes.pythonapi.PyObject_AsReadBuffer(obj, ctypes.byref(a), ctypes.byref(l)) ctypes.pythonapi.PyObject_AsReadBuffer(obj, ctypes.byref(a), ctypes.byref(l))
ptr = a.value ptr = a.value
datalen = l.value datalen = l.value
return libriffa.fpga_recv(fd, chnl, ptr, datalen/4, timeout) return libriffa.fpga_recv(fd, chnl, ptr, datalen//4, timeout)
# Resets the state of the FPGA and all transfers across all channels. This is # Resets the state of the FPGA and all transfers across all channels. This is