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Fixed a bug where the tx_multiplexer kept LBE field high on packets of 1 DW in length.

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This commit is contained in:
Dustin Richmond 2016-02-04 11:03:06 -08:00
parent 2a832ffe4e
commit bc8999eba4
2 changed files with 2 additions and 2 deletions
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2
fpga/riffa_hdl/tx_multiplexer_128.v
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@ -402,7 +402,7 @@ module tx_multiplexer_128
assign TXR_META_TYPE = rCountIsWr ? `TRLS_REQ_WR : `TRLS_REQ_RD;
assign TXR_META_ADDR = {rCountAddr,2'b00};
assign TXR_META_LENGTH = rCountLen;
assign TXR_META_LDWBE = rCountLen == 10'd1 ? 0 : 4'b1111;
assign TXR_META_LDWBE = rCountLen == 10'd1 ? 0 : 4'b1111; // TODO: This should be retimed
assign TXR_META_FDWBE = 4'b1111;
assign TXR_META_TAG = rCountTag;
assign TXR_META_EP = 1'b0;

2
fpga/riffa_hdl/tx_multiplexer_64.v
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@ -411,7 +411,7 @@ module tx_multiplexer_64
assign TXR_META_TYPE = rCapIsWr ? `TRLS_REQ_WR : `TRLS_REQ_RD;
assign TXR_META_ADDR = {rCapAddr,2'b00};
assign TXR_META_LENGTH = rCapLen;
assign TXR_META_LDWBE = 4'b1111;
assign TXR_META_LDWBE = rCapLen == 10'd1 ? 0 : 4'b1111; // TODO: This should be retimed
assign TXR_META_FDWBE = 4'b1111;
assign TXR_META_TAG = rCountTag;
assign TXR_META_EP = 1'b0;