FPGA/riffa
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Commit Graph

6 Commits

Author SHA1 Message Date
Dustin Richmond
17bdf731e6 Updating bitfiles for latest bug fix 2016-02-22 14:26:35 -08:00
Dustin Richmond
255fb848cb Another bit file update 2016-02-18 12:35:46 -08:00
Dustin Richmond
d27b265b90 Updating bitfiles with bugfixes from past commits 2016-02-04 14:58:36 -08:00
Dustin Richmond
ce83bdefe1 Adding updated bit files and project files 2016-01-27 10:39:17 -08:00
Dustin Richmond
c420b76c16 Finishing reset logic and testing/implementing across a wide swath of boards. 
Changes are mostly in the RX logic, where RST_IN was still used, though some new
logic (reset_extender) was added to riffa.v. Updated projects for: VC709, VC707,
ZC706 (partial), NetFPGA, ADM-7V3, ML605 (Still not working), AC701 (Untested)
and KC705 (Untested)
 2015-08-12 16:16:27 -07:00
Dustin Richmond
f96391061e Updating 7V3 board for bug fixes, and adding preliminary support for new boards. 
Added and tested the 7V3 and NetFPGA board projects. Added the KC705 board (Gen1
and Gen2, but haven't tested them)
 2015-07-30 15:45:13 -07:00