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mirror of https://github.com/KastnerRG/riffa.git synced 2025-01-30 23:02:54 +08:00

3 Commits

Author SHA1 Message Date
Dustin Richmond
ad496b4c94 Mega-commit (which I usually like to avoid, but this one didn't really come cleanly)
The majority of this work can be summarized as: Makefiles have been added to
generate all of the boards, boards for each vendor, board, and projects for each
board.

To make things cleaner I renamed a few of the Xilinx projects, and may rename
the latera projects for consistency.

I removed the de5_qsys directory, and moved all projects into the de5 directory,
but those projects have a Q between DE5 and the PCIe specifications, ie
DE5QGen... (haven't updated the documentation)

Added c4dev board (untested)

Apologies to those of you who recently switched onto the DEVEL branch.
2016-01-20 17:46:39 -08:00
Dustin Richmond
9e4c9241a1 Updating ultrascale projects, and riffa documentation
The riffa documentation said that the 7-series core lacked Gen2x8 support. This
is incorrect.
2015-09-01 08:55:00 -07:00
Dustin Richmond
f0efc47981 Adding preliminary VCU108 and KCU105 projects.
Also fixed a warning in the riffa.v file where a /* was in a comment
2015-07-31 15:19:52 -07:00