Expanded DONE_RST into four signals, for each of the four engine interfaces. In
the ultrascale engines, wired up all of the RST and DONE_RST signals. Quickly tested the logic in a power-on-reset like situation, no guarantees on graceful in-transmission resets. Classic engines will have to wait.
Still need to propagate the changes and hook the resets up in the formatters,
multiplexers, etc. RST_BUS will be the equivalent of a PCIe PERST Pin reset, a
general inelegant reset where formatting is disregarded. RST_LOGIC is a reset
caused by application or higher level logic, where formatting needs to be
considered so that the bus does not lock up. DONE_RST will signal that the
engine layer has finished resetting, and is ready to transmit data.
The C_VALUE parameter sets the reset value of each bit in the shift
register. All bits will get the same value, individual setting of reset values
is not implemented.
