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mirror of https://github.com/KastnerRG/riffa.git synced 2025-01-30 23:02:54 +08:00

11 Commits

Author SHA1 Message Date
Dustin Richmond
bfa63eb3ad Fixed a naming issue in the AC701 wrapper file.
tx_tlp_ready was named wTxTlpReady
2015-08-13 08:03:27 -07:00
Dustin Richmond
2f13ce9adc Adding missing ac701 riffa wrapper file. 2015-08-13 08:01:01 -07:00
Dustin Richmond
c420b76c16 Finishing reset logic and testing/implementing across a wide swath of boards.
Changes are mostly in the RX logic, where RST_IN was still used, though some new
logic (reset_extender) was added to riffa.v. Updated projects for: VC709, VC707,
ZC706 (partial), NetFPGA, ADM-7V3, ML605 (Still not working), AC701 (Untested)
and KC705 (Untested)
2015-08-12 16:16:27 -07:00
Dustin Richmond
f836029e8d Adding a few changes the the ML605 project.
Forgot to specify development board in the ip block, also commented out a ucf
file line.
2015-08-11 15:34:35 -07:00
Dustin Richmond
47530ee0cf Adding AC701 projects for RIFFA 2.2.1.
Also fixed a small bug in the KC705 riffa wrapper, and KC705 boards
2015-08-11 15:33:49 -07:00
Dustin Richmond
e13b825fa1 Adding VERY PRELIMINARY ML605 development board files. 2015-07-31 15:29:00 -07:00
Dustin Richmond
f0efc47981 Adding preliminary VCU108 and KCU105 projects.
Also fixed a warning in the riffa.v file where a /* was in a comment
2015-07-31 15:19:52 -07:00
Dustin Richmond
f96391061e Updating 7V3 board for bug fixes, and adding preliminary support for new boards.
Added and tested the 7V3 and NetFPGA board projects. Added the KC705 board (Gen1
and Gen2, but haven't tested them)
2015-07-30 15:45:13 -07:00
Dustin Richmond
d0e4df9737 Adding the Gen2 and Gen3 projects for the ADM 7V3 board 2015-07-29 08:32:44 -07:00
Dustin Richmond
e11eb70853 Adding AlphaData 7V3 project for user.
Does not meet timing, may have potential bug in TX Engine Logic
2015-07-27 11:20:38 -07:00
Dustin Richmond
98b09aa12a Initial commit of RIFFA development repository (RIFFA 2.2) 2015-05-04 14:50:57 -07:00