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2 Commits

Author SHA1 Message Date
Dustin Richmond
c420b76c16 Finishing reset logic and testing/implementing across a wide swath of boards. 
Changes are mostly in the RX logic, where RST_IN was still used, though some new
logic (reset_extender) was added to riffa.v. Updated projects for: VC709, VC707,
ZC706 (partial), NetFPGA, ADM-7V3, ML605 (Still not working), AC701 (Untested)
and KC705 (Untested)
 2015-08-12 16:16:27 -07:00
Dustin Richmond
9d7543a5ff Adding DE2 project files (only slightly tested) 2015-08-11 16:47:13 -07:00