1
0
mirror of https://github.com/KastnerRG/riffa.git synced 2025-01-30 23:02:54 +08:00

4 Commits

Author SHA1 Message Date
Dustin Richmond
ad101929f2 Updating board.mk makefiles to clean and reset xilinx projects 2016-01-26 11:15:21 -08:00
Dustin Richmond
cd204136c6 Further updates to hierarchical makefiles. 2016-01-25 16:37:33 -08:00
Dustin Richmond
680260b3f7 Adding copyright statments 2016-01-20 18:13:06 -08:00
Dustin Richmond
ad496b4c94 Mega-commit (which I usually like to avoid, but this one didn't really come cleanly)
The majority of this work can be summarized as: Makefiles have been added to
generate all of the boards, boards for each vendor, board, and projects for each
board.

To make things cleaner I renamed a few of the Xilinx projects, and may rename
the latera projects for consistency.

I removed the de5_qsys directory, and moved all projects into the de5 directory,
but those projects have a Q between DE5 and the PCIe specifications, ie
DE5QGen... (haven't updated the documentation)

Added c4dev board (untested)

Apologies to those of you who recently switched onto the DEVEL branch.
2016-01-20 17:46:39 -08:00