mirror of
https://github.com/KastnerRG/riffa.git
synced 2025-01-30 23:02:54 +08:00
ad496b4c94
The majority of this work can be summarized as: Makefiles have been added to generate all of the boards, boards for each vendor, board, and projects for each board. To make things cleaner I renamed a few of the Xilinx projects, and may rename the latera projects for consistency. I removed the de5_qsys directory, and moved all projects into the de5 directory, but those projects have a Q between DE5 and the PCIe specifications, ie DE5QGen... (haven't updated the documentation) Added c4dev board (untested) Apologies to those of you who recently switched onto the DEVEL branch.
665 lines
33 KiB
XML
665 lines
33 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags=""
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element $${FILENAME}
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{
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datum _originalDeviceFamily
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{
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value = "Stratix V";
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type = "String";
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}
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}
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element PCIeGen1x8If64
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{
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datum _sortIndex
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{
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value = "1";
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type = "int";
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}
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}
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element XCVRCtrlGen1x8
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{
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datum _sortIndex
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{
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value = "2";
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type = "int";
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}
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}
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element XCVRDrvGen1x8
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{
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datum _sortIndex
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{
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value = "3";
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type = "int";
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}
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}
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element clk_0
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
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<parameter name="device" value="5SGXEA7N2F45C2" />
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<parameter name="deviceFamily" value="Stratix V" />
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<parameter name="deviceSpeedGrade" value="2_H2" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="hideFromIPCatalog" value="false" />
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<parameter name="maxAdditionalLatency" value="1" />
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<parameter name="projectName" value="" />
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="testBenchDutName" value="" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
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<instanceScript></instanceScript>
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<interface
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name="drvstat"
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internal="XCVRDrvGen1x8.hip_status_drv"
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type="conduit"
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dir="end" />
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<interface
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name="mgmtclk"
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internal="XCVRCtrlGen1x8.mgmt_clk_clk"
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type="clock"
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dir="end" />
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<interface
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name="mgmtrst"
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internal="XCVRCtrlGen1x8.mgmt_rst_reset"
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type="reset"
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dir="end" />
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<interface
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name="pciecfg"
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internal="PCIeGen1x8If64.config_tl"
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type="conduit"
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dir="end" />
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<interface
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name="pciecoreclk"
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internal="PCIeGen1x8If64.coreclkout_hip"
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type="clock"
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dir="start" />
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<interface
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name="pciehip"
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internal="PCIeGen1x8If64.hip_rst"
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type="conduit"
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dir="end" />
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<interface
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name="pciemsi"
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internal="PCIeGen1x8If64.int_msi"
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type="conduit"
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dir="end" />
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<interface
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name="pcienpor"
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internal="PCIeGen1x8If64.npor"
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type="conduit"
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dir="end" />
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<interface
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name="pciepld"
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internal="PCIeGen1x8If64.pld_clk"
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type="clock"
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dir="end" />
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<interface
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name="pcierefclk"
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internal="PCIeGen1x8If64.refclk"
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type="clock"
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dir="end" />
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<interface
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name="pcieserial"
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internal="PCIeGen1x8If64.hip_serial"
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type="conduit"
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dir="end" />
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<interface
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name="pciestat"
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internal="PCIeGen1x8If64.hip_status"
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type="conduit"
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dir="end" />
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<interface
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name="reconfigpldclk"
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internal="XCVRDrvGen1x8.pld_clk"
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type="clock"
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dir="end" />
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<interface
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name="reconfigrefclk"
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internal="XCVRDrvGen1x8.reconfig_xcvr_clk"
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type="clock"
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dir="end" />
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<interface
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name="reconfigrst"
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internal="XCVRDrvGen1x8.reconfig_xcvr_rst"
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type="reset"
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dir="end" />
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<interface name="reset" internal="clk_0.clk_in_reset" />
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<interface
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name="rx_st"
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internal="PCIeGen1x8If64.rx_st"
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type="avalon_streaming"
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dir="start" />
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<interface
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name="tx_st"
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internal="PCIeGen1x8If64.tx_st"
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type="avalon_streaming"
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dir="end" />
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<module
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name="PCIeGen1x8If64"
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kind="altera_pcie_sv_hip_ast"
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version="14.1"
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enabled="1">
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<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
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<parameter name="advanced_default_hwtcl_atomic_malformed" value="true" />
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<parameter name="advanced_default_hwtcl_atomic_op_completer_32bit" value="false" />
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<parameter name="advanced_default_hwtcl_atomic_op_completer_64bit" value="false" />
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<parameter name="advanced_default_hwtcl_atomic_op_routing" value="false" />
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<parameter name="advanced_default_hwtcl_bridge_port_ssid_support" value="false" />
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<parameter name="advanced_default_hwtcl_bridge_port_vga_enable" value="false" />
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<parameter name="advanced_default_hwtcl_bypass_cdc" value="false" />
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<parameter name="advanced_default_hwtcl_cas_completer_128bit" value="false" />
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<parameter name="advanced_default_hwtcl_cdc_dummy_insert_limit" value="11" />
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<parameter name="advanced_default_hwtcl_d0_pme" value="false" />
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<parameter name="advanced_default_hwtcl_d1_pme" value="false" />
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<parameter name="advanced_default_hwtcl_d1_support" value="false" />
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<parameter name="advanced_default_hwtcl_d2_pme" value="false" />
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<parameter name="advanced_default_hwtcl_d2_support" value="false" />
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<parameter name="advanced_default_hwtcl_d3_cold_pme" value="false" />
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<parameter name="advanced_default_hwtcl_d3_hot_pme" value="false" />
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<parameter name="advanced_default_hwtcl_data_pack_rx" value="disable" />
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<parameter name="advanced_default_hwtcl_deskew_comma" value="com_deskw" />
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<parameter name="advanced_default_hwtcl_device_number" value="0" />
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<parameter name="advanced_default_hwtcl_disable_link_x2_support" value="false" />
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<parameter name="advanced_default_hwtcl_disable_snoop_packet" value="false" />
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<parameter name="advanced_default_hwtcl_ei_delay_powerdown_count" value="10" />
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<parameter name="advanced_default_hwtcl_eie_before_nfts_count" value="4" />
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<parameter
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name="advanced_default_hwtcl_enable_adapter_half_rate_mode"
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value="false" />
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<parameter name="advanced_default_hwtcl_enable_l1_aspm" value="false" />
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<parameter name="advanced_default_hwtcl_enable_rx_buffer_checking" value="false" />
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<parameter name="advanced_default_hwtcl_extended_format_field" value="false" />
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<parameter name="advanced_default_hwtcl_extended_tag_reset" value="false" />
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<parameter name="advanced_default_hwtcl_fc_init_timer" value="1024" />
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<parameter name="advanced_default_hwtcl_flow_control_timeout_count" value="200" />
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<parameter name="advanced_default_hwtcl_flow_control_update_count" value="30" />
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<parameter name="advanced_default_hwtcl_flr_capability" value="false" />
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<parameter name="advanced_default_hwtcl_gen2_diffclock_nfts_count" value="255" />
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<parameter name="advanced_default_hwtcl_gen2_sameclock_nfts_count" value="255" />
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<parameter name="advanced_default_hwtcl_hot_plug_support" value="0" />
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<parameter name="advanced_default_hwtcl_interrupt_pin" value="inta" />
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<parameter name="advanced_default_hwtcl_l01_entry_latency" value="31" />
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<parameter name="advanced_default_hwtcl_l0_exit_latency_diffclock" value="6" />
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<parameter name="advanced_default_hwtcl_l0_exit_latency_sameclock" value="6" />
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<parameter name="advanced_default_hwtcl_l1_exit_latency_diffclock" value="0" />
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<parameter name="advanced_default_hwtcl_l1_exit_latency_sameclock" value="0" />
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<parameter name="advanced_default_hwtcl_low_priority_vc" value="single_vc" />
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<parameter name="advanced_default_hwtcl_ltr_mechanism" value="false" />
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<parameter name="advanced_default_hwtcl_ltssm_1ms_timeout" value="disable" />
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<parameter name="advanced_default_hwtcl_ltssm_freqlocked_check" value="disable" />
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<parameter name="advanced_default_hwtcl_maximum_current" value="0" />
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<parameter name="advanced_default_hwtcl_no_command_completed" value="true" />
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<parameter name="advanced_default_hwtcl_no_soft_reset" value="false" />
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<parameter name="advanced_default_hwtcl_pclk_out_sel" value="pclk" />
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<parameter name="advanced_default_hwtcl_pipex1_debug_sel" value="disable" />
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<parameter name="advanced_default_hwtcl_register_pipe_signals" value="false" />
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<parameter name="advanced_default_hwtcl_reserved_debug" value="0" />
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<parameter
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name="advanced_default_hwtcl_retry_buffer_last_active_address"
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value="2047" />
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<parameter name="advanced_default_hwtcl_rx_l0s_count_idl" value="0" />
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<parameter name="advanced_default_hwtcl_set_l0s" value="0" />
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<parameter name="advanced_default_hwtcl_skp_os_gen3_count" value="0" />
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<parameter name="advanced_default_hwtcl_skp_os_schedule_count" value="0" />
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<parameter name="advanced_default_hwtcl_ssid" value="0" />
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<parameter name="advanced_default_hwtcl_ssvid" value="0" />
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<parameter name="advanced_default_hwtcl_tph_completer" value="false" />
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<parameter name="advanced_default_hwtcl_tx_cdc_almost_empty" value="5" />
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<parameter name="advanced_default_hwtcl_vc0_clk_enable" value="true" />
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<parameter name="advanced_default_hwtcl_wrong_device_id" value="disable" />
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<parameter name="advanced_default_parameter_override" value="0" />
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<parameter name="ast_width_hwtcl" value="Avalon-ST 64-bit" />
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<parameter name="bar0_size_mask_hwtcl" value="10" />
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<parameter name="bar0_type_hwtcl" value="2" />
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<parameter name="bar1_size_mask_hwtcl" value="0" />
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<parameter name="bar1_type_hwtcl" value="0" />
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<parameter name="bar2_size_mask_hwtcl" value="0" />
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<parameter name="bar2_type_hwtcl" value="0" />
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<parameter name="bar3_size_mask_hwtcl" value="0" />
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<parameter name="bar3_type_hwtcl" value="0" />
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<parameter name="bar4_size_mask_hwtcl" value="0" />
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<parameter name="bar4_type_hwtcl" value="0" />
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<parameter name="bar5_size_mask_hwtcl" value="0" />
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<parameter name="bar5_type_hwtcl" value="0" />
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<parameter name="change_deemphasis_hwtcl" value="0" />
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<parameter name="class_code_hwtcl" value="0" />
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<parameter name="completion_timeout_hwtcl" value="ABCD" />
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<parameter name="design_environment_hwtcl" value="QSYS" />
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<parameter name="device_id_hwtcl" value="1" />
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<parameter name="dll_active_report_support_hwtcl" value="0" />
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<parameter name="ecrc_check_capable_hwtcl" value="0" />
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<parameter name="ecrc_gen_capable_hwtcl" value="0" />
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<parameter name="enable_completion_timeout_disable_hwtcl" value="1" />
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<parameter name="enable_function_msix_support_hwtcl" value="0" />
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<parameter name="enable_pcisigtest_hwtcl" value="0" />
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<parameter name="enable_pipe32_phyip_ser_driver_hwtcl" value="0" />
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<parameter name="enable_pipe32_sim_hwtcl" value="0" />
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<parameter name="enable_power_on_rst_pulse_hwtcl" value="0" />
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<parameter name="enable_slot_register_hwtcl" value="0" />
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<parameter name="enable_tl_only_sim_hwtcl" value="0" />
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<parameter name="endpoint_l0_latency_hwtcl" value="0" />
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<parameter name="endpoint_l1_latency_hwtcl" value="0" />
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<parameter name="expansion_base_address_register_hwtcl" value="0" />
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<parameter name="extend_tag_field_hwtcl" value="64" />
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<parameter name="fixed_preset_on" value="0" />
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<parameter name="force_hrc" value="0" />
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<parameter name="force_src" value="0" />
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<parameter name="full_swing_hwtcl" value="35" />
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<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen1 (2.5 Gbps)" />
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<parameter name="gen3_coeff_10_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_nxtber_less_hwtcl">g3_coeff_10_nxtber_less</parameter>
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<parameter name="gen3_coeff_10_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_nxtber_more_hwtcl">g3_coeff_10_nxtber_more</parameter>
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<parameter name="gen3_coeff_10_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_10_sel_hwtcl" value="preset_10" />
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<parameter name="gen3_coeff_11_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_nxtber_less_hwtcl">g3_coeff_11_nxtber_less</parameter>
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<parameter name="gen3_coeff_11_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_nxtber_more_hwtcl">g3_coeff_11_nxtber_more</parameter>
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<parameter name="gen3_coeff_11_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_11_sel_hwtcl" value="preset_11" />
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<parameter name="gen3_coeff_12_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_nxtber_less_hwtcl">g3_coeff_12_nxtber_less</parameter>
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<parameter name="gen3_coeff_12_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_nxtber_more_hwtcl">g3_coeff_12_nxtber_more</parameter>
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<parameter name="gen3_coeff_12_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_12_sel_hwtcl" value="preset_12" />
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<parameter name="gen3_coeff_13_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_nxtber_less_hwtcl">g3_coeff_13_nxtber_less</parameter>
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<parameter name="gen3_coeff_13_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_nxtber_more_hwtcl">g3_coeff_13_nxtber_more</parameter>
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<parameter name="gen3_coeff_13_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_13_sel_hwtcl" value="preset_13" />
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<parameter name="gen3_coeff_14_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_nxtber_less_hwtcl">g3_coeff_14_nxtber_less</parameter>
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<parameter name="gen3_coeff_14_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_nxtber_more_hwtcl">g3_coeff_14_nxtber_more</parameter>
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<parameter name="gen3_coeff_14_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_14_sel_hwtcl" value="preset_14" />
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<parameter name="gen3_coeff_15_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_nxtber_less_hwtcl">g3_coeff_15_nxtber_less</parameter>
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<parameter name="gen3_coeff_15_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_nxtber_more_hwtcl">g3_coeff_15_nxtber_more</parameter>
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<parameter name="gen3_coeff_15_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_15_sel_hwtcl" value="preset_15" />
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<parameter name="gen3_coeff_16_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_nxtber_less_hwtcl">g3_coeff_16_nxtber_less</parameter>
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<parameter name="gen3_coeff_16_nxtber_less_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_nxtber_more_hwtcl">g3_coeff_16_nxtber_more</parameter>
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<parameter name="gen3_coeff_16_nxtber_more_ptr_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_preset_hint_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_reqber_hwtcl" value="0" />
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<parameter name="gen3_coeff_16_sel_hwtcl" value="preset_16" />
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<parameter name="gen3_coeff_17_ber_meas_hwtcl" value="0" />
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<parameter name="gen3_coeff_17_hwtcl" value="0" />
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<parameter name="gen3_coeff_17_nxtber_less_hwtcl">g3_coeff_17_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_17_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_17_nxtber_more_hwtcl">g3_coeff_17_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_17_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_17_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_17_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_17_sel_hwtcl" value="preset_17" />
|
|
<parameter name="gen3_coeff_18_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_nxtber_less_hwtcl">g3_coeff_18_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_18_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_nxtber_more_hwtcl">g3_coeff_18_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_18_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_18_sel_hwtcl" value="preset_18" />
|
|
<parameter name="gen3_coeff_19_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_nxtber_less_hwtcl">g3_coeff_19_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_19_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_nxtber_more_hwtcl">g3_coeff_19_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_19_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_19_sel_hwtcl" value="preset_19" />
|
|
<parameter name="gen3_coeff_1_ber_meas_hwtcl" value="2" />
|
|
<parameter name="gen3_coeff_1_hwtcl" value="7" />
|
|
<parameter name="gen3_coeff_1_nxtber_less_hwtcl">g3_coeff_1_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_1_nxtber_less_ptr_hwtcl" value="1" />
|
|
<parameter name="gen3_coeff_1_nxtber_more_hwtcl">g3_coeff_1_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_1_nxtber_more_ptr_hwtcl" value="1" />
|
|
<parameter name="gen3_coeff_1_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_1_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_1_sel_hwtcl" value="preset_1" />
|
|
<parameter name="gen3_coeff_20_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_nxtber_less_hwtcl">g3_coeff_20_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_20_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_nxtber_more_hwtcl">g3_coeff_20_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_20_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_20_sel_hwtcl" value="preset_20" />
|
|
<parameter name="gen3_coeff_21_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_nxtber_less_hwtcl">g3_coeff_21_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_21_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_nxtber_more_hwtcl">g3_coeff_21_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_21_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_21_sel_hwtcl" value="preset_21" />
|
|
<parameter name="gen3_coeff_22_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_nxtber_less_hwtcl">g3_coeff_22_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_22_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_nxtber_more_hwtcl">g3_coeff_22_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_22_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_22_sel_hwtcl" value="preset_22" />
|
|
<parameter name="gen3_coeff_23_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_nxtber_less_hwtcl">g3_coeff_23_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_23_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_nxtber_more_hwtcl">g3_coeff_23_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_23_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_23_sel_hwtcl" value="preset_23" />
|
|
<parameter name="gen3_coeff_24_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_nxtber_less_hwtcl">g3_coeff_24_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_24_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_nxtber_more_hwtcl">g3_coeff_24_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_24_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_24_sel_hwtcl" value="preset_24" />
|
|
<parameter name="gen3_coeff_2_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_nxtber_less_hwtcl">g3_coeff_2_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_2_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_nxtber_more_hwtcl">g3_coeff_2_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_2_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_2_sel_hwtcl" value="preset_2" />
|
|
<parameter name="gen3_coeff_3_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_nxtber_less_hwtcl">g3_coeff_3_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_3_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_nxtber_more_hwtcl">g3_coeff_3_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_3_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_3_sel_hwtcl" value="preset_3" />
|
|
<parameter name="gen3_coeff_4_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_nxtber_less_hwtcl">g3_coeff_4_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_4_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_nxtber_more_hwtcl">g3_coeff_4_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_4_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_4_sel_hwtcl" value="preset_4" />
|
|
<parameter name="gen3_coeff_5_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_nxtber_less_hwtcl">g3_coeff_5_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_5_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_nxtber_more_hwtcl">g3_coeff_5_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_5_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_5_sel_hwtcl" value="preset_5" />
|
|
<parameter name="gen3_coeff_6_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_nxtber_less_hwtcl">g3_coeff_6_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_6_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_nxtber_more_hwtcl">g3_coeff_6_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_6_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_6_sel_hwtcl" value="preset_6" />
|
|
<parameter name="gen3_coeff_7_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_nxtber_less_hwtcl">g3_coeff_7_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_7_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_nxtber_more_hwtcl">g3_coeff_7_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_7_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_7_sel_hwtcl" value="preset_7" />
|
|
<parameter name="gen3_coeff_8_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_nxtber_less_hwtcl">g3_coeff_8_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_8_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_nxtber_more_hwtcl">g3_coeff_8_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_8_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_8_sel_hwtcl" value="preset_8" />
|
|
<parameter name="gen3_coeff_9_ber_meas_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_nxtber_less_hwtcl">g3_coeff_9_nxtber_less</parameter>
|
|
<parameter name="gen3_coeff_9_nxtber_less_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_nxtber_more_hwtcl">g3_coeff_9_nxtber_more</parameter>
|
|
<parameter name="gen3_coeff_9_nxtber_more_ptr_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_preset_hint_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_reqber_hwtcl" value="0" />
|
|
<parameter name="gen3_coeff_9_sel_hwtcl" value="preset_9" />
|
|
<parameter name="gen3_full_swing_hwtcl" value="35" />
|
|
<parameter name="gen3_low_freq_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_10_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_11_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_1_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_2_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_3_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_4_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_5_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_6_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_7_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_8_hwtcl" value="0" />
|
|
<parameter name="gen3_preset_coeff_9_hwtcl" value="0" />
|
|
<parameter name="gen3_rxfreqlock_counter_hwtcl" value="0" />
|
|
<parameter name="hip_reconfig_hwtcl" value="0" />
|
|
<parameter name="hip_tag_checking_hwtcl" value="1" />
|
|
<parameter name="hwtcl_override_g2_txvod" value="1" />
|
|
<parameter name="hwtcl_override_g3rxcoef" value="0" />
|
|
<parameter name="hwtcl_override_g3txcoef" value="0" />
|
|
<parameter name="in_cvp_mode_hwtcl" value="0" />
|
|
<parameter name="io_window_addr_width_hwtcl" value="0" />
|
|
<parameter name="lane_mask_hwtcl" value="x8" />
|
|
<parameter name="low_latency_mode_hwtcl" value="0" />
|
|
<parameter name="max_payload_size_hwtcl" value="256" />
|
|
<parameter name="msi_64bit_addressing_capable_hwtcl" value="true" />
|
|
<parameter name="msi_masking_capable_hwtcl" value="false" />
|
|
<parameter name="msi_multi_message_capable_hwtcl" value="1" />
|
|
<parameter name="msi_support_hwtcl" value="true" />
|
|
<parameter name="msix_pba_bir_hwtcl" value="0" />
|
|
<parameter name="msix_pba_offset_hwtcl" value="0" />
|
|
<parameter name="msix_table_bir_hwtcl" value="0" />
|
|
<parameter name="msix_table_offset_hwtcl" value="0" />
|
|
<parameter name="msix_table_size_hwtcl" value="0" />
|
|
<parameter name="multiple_packets_per_cycle_hwtcl" value="0" />
|
|
<parameter name="override_rxbuffer_cred_preset" value="0" />
|
|
<parameter name="override_tbpartner_driver_setting_hwtcl" value="0" />
|
|
<parameter name="pcie_inspector_hwtcl" value="0" />
|
|
<parameter name="pcie_qsys" value="1" />
|
|
<parameter name="pcie_spec_version_hwtcl" value="2.1" />
|
|
<parameter name="pll_refclk_freq_hwtcl" value="100 MHz" />
|
|
<parameter name="port_link_number_hwtcl" value="1" />
|
|
<parameter name="port_type_hwtcl" value="Native endpoint" />
|
|
<parameter name="prefetchable_mem_window_addr_width_hwtcl" value="0" />
|
|
<parameter name="revision_id_hwtcl" value="1" />
|
|
<parameter name="rpre_emph_a_val_hwtcl" value="9" />
|
|
<parameter name="rpre_emph_b_val_hwtcl" value="0" />
|
|
<parameter name="rpre_emph_c_val_hwtcl" value="16" />
|
|
<parameter name="rpre_emph_d_val_hwtcl" value="13" />
|
|
<parameter name="rpre_emph_e_val_hwtcl" value="5" />
|
|
<parameter name="rvod_sel_a_val_hwtcl" value="42" />
|
|
<parameter name="rvod_sel_b_val_hwtcl" value="38" />
|
|
<parameter name="rvod_sel_c_val_hwtcl" value="38" />
|
|
<parameter name="rvod_sel_d_val_hwtcl" value="43" />
|
|
<parameter name="rvod_sel_e_val_hwtcl" value="15" />
|
|
<parameter name="rxbuffer_rxreq_hwtcl" value="Minimum" />
|
|
<parameter name="serial_sim_hwtcl" value="1" />
|
|
<parameter name="set_pld_clk_x1_625MHz_hwtcl" value="0" />
|
|
<parameter name="slot_number_hwtcl" value="0" />
|
|
<parameter name="slot_power_limit_hwtcl" value="0" />
|
|
<parameter name="slot_power_scale_hwtcl" value="0" />
|
|
<parameter name="slotclkcfg_hwtcl" value="1" />
|
|
<parameter name="subsystem_device_id_hwtcl" value="0" />
|
|
<parameter name="subsystem_vendor_id_hwtcl" value="0" />
|
|
<parameter name="surprise_down_error_support_hwtcl" value="0" />
|
|
<parameter name="tlp_insp_trg_dw0_hwtcl" value="2049" />
|
|
<parameter name="tlp_insp_trg_dw1_hwtcl" value="0" />
|
|
<parameter name="tlp_insp_trg_dw2_hwtcl" value="0" />
|
|
<parameter name="tlp_insp_trg_dw3_hwtcl" value="0" />
|
|
<parameter name="tlp_inspector_hwtcl" value="0" />
|
|
<parameter name="tlp_inspector_use_signal_probe_hwtcl" value="0" />
|
|
<parameter name="track_rxfc_cplbuf_ovf_hwtcl" value="0" />
|
|
<parameter name="use_aer_hwtcl" value="0" />
|
|
<parameter name="use_ast_parity" value="0" />
|
|
<parameter name="use_atx_pll_hwtcl" value="0" />
|
|
<parameter name="use_config_bypass_hwtcl" value="0" />
|
|
<parameter name="use_crc_forwarding_hwtcl" value="0" />
|
|
<parameter name="use_cvp_update_core_pof_hwtcl" value="0" />
|
|
<parameter name="use_pci_ext_hwtcl" value="0" />
|
|
<parameter name="use_pcie_ext_hwtcl" value="0" />
|
|
<parameter name="use_rx_st_be_hwtcl" value="0" />
|
|
<parameter name="use_tx_cons_cred_sel_hwtcl" value="0" />
|
|
<parameter name="user_id_hwtcl" value="0" />
|
|
<parameter name="vendor_id_hwtcl" value="4466" />
|
|
<parameter name="vsec_id_hwtcl" value="40960" />
|
|
<parameter name="vsec_rev_hwtcl" value="0" />
|
|
</module>
|
|
<module
|
|
name="XCVRCtrlGen1x8"
|
|
kind="alt_xcvr_reconfig"
|
|
version="14.1"
|
|
enabled="1">
|
|
<parameter name="ber_en" value="0" />
|
|
<parameter name="device_family" value="Stratix V" />
|
|
<parameter name="enable_adce" value="0" />
|
|
<parameter name="enable_analog" value="1" />
|
|
<parameter name="enable_dcd" value="0" />
|
|
<parameter name="enable_dcd_power_up" value="1" />
|
|
<parameter name="enable_dfe" value="0" />
|
|
<parameter name="enable_eyemon" value="0" />
|
|
<parameter name="enable_mif" value="0" />
|
|
<parameter name="enable_offset" value="1" />
|
|
<parameter name="gui_cal_status_port" value="false" />
|
|
<parameter name="gui_enable_pll" value="0" />
|
|
<parameter name="gui_split_sizes" value="" />
|
|
<parameter name="number_of_reconfig_interfaces" value="10" />
|
|
</module>
|
|
<module
|
|
name="XCVRDrvGen1x8"
|
|
kind="altera_pcie_reconfig_driver"
|
|
version="14.1"
|
|
enabled="1">
|
|
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
|
|
<parameter name="enable_cal_busy_hwtcl" value="0" />
|
|
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen1 (2.5 Gbps)" />
|
|
<parameter name="number_of_reconfig_interfaces" value="10" />
|
|
</module>
|
|
<module name="clk_0" kind="clock_source" version="14.1" enabled="0">
|
|
<parameter name="clockFrequency" value="50000000" />
|
|
<parameter name="clockFrequencyKnown" value="true" />
|
|
<parameter name="inputClockFrequency" value="0" />
|
|
<parameter name="resetSynchronousEdges" value="NONE" />
|
|
</module>
|
|
<connection
|
|
kind="avalon"
|
|
version="14.1"
|
|
start="XCVRDrvGen1x8.reconfig_mgmt"
|
|
end="XCVRCtrlGen1x8.reconfig_mgmt">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="14.1"
|
|
start="XCVRDrvGen1x8.hip_currentspeed"
|
|
end="PCIeGen1x8If64.hip_currentspeed">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="14.1"
|
|
start="XCVRDrvGen1x8.reconfig_busy"
|
|
end="XCVRCtrlGen1x8.reconfig_busy">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="14.1"
|
|
start="XCVRCtrlGen1x8.reconfig_from_xcvr"
|
|
end="PCIeGen1x8If64.reconfig_from_xcvr">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<connection
|
|
kind="conduit"
|
|
version="14.1"
|
|
start="XCVRCtrlGen1x8.reconfig_to_xcvr"
|
|
end="PCIeGen1x8If64.reconfig_to_xcvr">
|
|
<parameter name="endPort" value="" />
|
|
<parameter name="endPortLSB" value="0" />
|
|
<parameter name="startPort" value="" />
|
|
<parameter name="startPortLSB" value="0" />
|
|
<parameter name="width" value="0" />
|
|
</connection>
|
|
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
|
|
</system>
|