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FPGA
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riffa
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https://github.com/KastnerRG/riffa.git
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riffa
/
fpga
/
xilinx
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zc706
History
Dustin Richmond
025d2a424c
Correcting all C_NUM_CHNL parameters to 1 (for testing)
2016-01-25 16:51:19 -08:00
..
ZC706_Gen1x4If64
Correcting all C_NUM_CHNL parameters to 1 (for testing)
2016-01-25 16:51:19 -08:00
ZC706_Gen2x4If128
Adding copyright statments
2016-01-20 18:13:06 -08:00
board.mk
Further updates to hierarchical makefiles.
2016-01-25 16:37:33 -08:00
Makefile
Further updates to hierarchical makefiles.
2016-01-25 16:37:33 -08:00
riffa_wrapper_zc706.v
Finishing reset logic and testing/implementing across a wide swath of boards.
2015-08-12 16:16:27 -07:00
