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riffa/fpga/altera/de4
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Dustin Richmond 3d3f866649 Fixing a bug in the RXR engines/RXC Engines that seems to only affect DE4 Gen2 
devices.

On IP Compiler devices, it is apparently possible to have valid drop
mid-packet. This condition is now checked, and has been tested (though new bit
files have not be uploaded)
2015-08-26 16:14:40 -07:00
..
DE4Gen1x8If64
Fixing a bug in the RXR engines/RXC Engines that seems to only affect DE4 Gen2
2015-08-26 16:14:40 -07:00
DE4Gen2x8If128
Fixing a bug in the RXR engines/RXC Engines that seems to only affect DE4 Gen2
2015-08-26 16:14:40 -07:00
riffa_wrapper_de4.v
Fixing a bug in the RXR engines/RXC Engines that seems to only affect DE4 Gen2
2015-08-26 16:14:40 -07:00