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riffa/fpga/xilinx/kcu105/Makefile
Dustin Richmond ad496b4c94 Mega-commit (which I usually like to avoid, but this one didn't really come cleanly)
The majority of this work can be summarized as: Makefiles have been added to
generate all of the boards, boards for each vendor, board, and projects for each
board.

To make things cleaner I renamed a few of the Xilinx projects, and may rename
the latera projects for consistency.

I removed the de5_qsys directory, and moved all projects into the de5 directory,
but those projects have a Q between DE5 and the PCIe specifications, ie
DE5QGen... (haven't updated the documentation)

Added c4dev board (untested)

Apologies to those of you who recently switched onto the DEVEL branch.
2016-01-20 17:46:39 -08:00

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395 B
Makefile

BOARD:=kcu105
BOARD_PROJECTS:=KCU105_Gen1x8If64 KCU105_Gen2x8If128 KCU105_Gen3x4If128
BOARD_PATH:=$(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v
SUBDIRS = $(BOARD_PROJECTS)
all: $(SUBDIRS)
$(SUBDIRS)::
$(MAKE) -C $@ $(MAKECMDGOALS) BOARD_HDL=$(BOARD_HDL)
.PHONY:clean $(SUBDIRS)
clean: $(SUBDIRS)
rm -rf *.log *.jou .Xil *~