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73 lines
3.3 KiB
Makefile
73 lines
3.3 KiB
Makefile
# ----------------------------------------------------------------------
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# Copyright (c) 2015, The Regents of the University of California All
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# rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# * Redistributions in binary form must reproduce the above
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# copyright notice, this list of conditions and the following
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# disclaimer in the documentation and/or other materials provided
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# with the distribution.
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#
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# * Neither the name of The Regents of the University of California
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# nor the names of its contributors may be used to endorse or
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# promote products derived from this software without specific
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# prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL REGENTS OF THE
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# UNIVERSITY OF CALIFORNIA BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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# DAMAGE.
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# ----------------------------------------------------------------------
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#-----------------------------------------------------------------------
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# Filename: board.mk
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# Version: 1.0
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# Description: Board-specific include makefile
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# Author: Dustin Richmond (@darichmond)
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#-----------------------------------------------------------------------
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BOARD_HDL:= $(BOARD_PATH)/riffa_wrapper_$(BOARD).v
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PROJECT_IP=
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PROJECT_HDL=hdl/$(PROJECT).v $(BOARD_HDL) $(patsubst %, $(RIFFA_PATH)/%,$(RIFFA_HDL)) $(PROJECT_FILES)
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PROJECT_CONSTR=constr/$(PROJECT).xdc
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PROJECT_FILE=prj/$(PROJECT).xpr
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PROJECT_FILES=$(PROJECT_IP) $(PROJECT_CONSTR) $(PROJECT_QSRCS) $(PROJECT_HDL)
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.PHONY:$(PROJECT) all synthesis implementation clean clobber $(TYPE) $(VENDOR) $(BOARD)
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$(PROJECT): bit/$(PROJECT).bit
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@echo Compiling Project $@
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bit/$(PROJECT).bit: $($(PROJECT)_FILES)
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echo "launch_runs impl_1 -to_step write_bitstream -jobs $(JOBS); wait_on_run impl_1" | vivado -mode tcl prj/$(PROJECT).xpr
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mv prj/$(PROJECT).runs/impl_1/$(PROJECT).bit bit/
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synthesis: prj/$(PROJECT).runs/synth_1
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prj/$(PROJECT).runs/synth_1: $($(PROJECT)_FILES)
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echo "launch_runs synth_1 -jobs $(JOBS); wait_on_run synth_1" | vivado -mode tcl prj/$(PROJECT).xpr
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implementation:prj/$(PROJECT).runs/impl_1
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prj/$(PROJECT).runs/impl_1: $($(PROJECT)_FILES)
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echo "launch_runs impl_1 -jobs $(JOBS); wait_on_run impl1" | vivado -mode tcl prj/$(PROJECT).xpr
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all $(TYPE) $(VENDOR) $(BOARD):$(PROJECT)
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clean:
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rm -rf *.log *.jou *~ .Xil
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rm -rf ip/doc ip/sim ip/source ip/synth ip/*.dcp ip/*.v ip/*.xml ip/*.vhdl ip/*.veo ip/*~
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rm -rf prj/*.hw prj/*.runs prj/*.cache prj/*~
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clobber:
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rm -rf bit/*.bit
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