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riffa/fpga
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Dustin Richmond e2f3abe01b Fixed a bug in RIFFA 2.2 for the Classic Xilinx 128-bit interface. 
Bug caused received 128-bit Request Headers without payload to signal data word valid one cycle early. May not be a final fix. Unlikely to affect current users.
2015-07-21 15:46:36 -07:00
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altera
Initial commit of RIFFA development repository (RIFFA 2.2)
2015-05-04 14:50:57 -07:00
riffa_hdl
Fixed a bug in RIFFA 2.2 for the Classic Xilinx 128-bit interface.
2015-07-21 15:46:36 -07:00
xilinx
Initial commit of RIFFA development repository (RIFFA 2.2)
2015-05-04 14:50:57 -07:00