module ctrl(
  clk,
  rst_n,
  
  pwm_out

);

  input clk;
  input rst_n;
  wire en_pwm;
  wire [15:0] pwm_arr;
  wire [15:0] pwm_ccr;
  output  pwm_out;



  pwm(
    .clk(),
    .rst_n(),
    .en_pwm(),
    .pwm_arr(),
    .pwm_ccr(),
    .pwm_out()
  
  );




endmodule