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https://github.com/enjoy-digital/usb3_pipe.git
synced 2025-01-04 10:18:41 +08:00
kc705: generate sys_clk from the same clock source used for clocking the transceiver (to avoid backpressure issues with daisho core)
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parent
f2e20c64ab
commit
27e6f389c8
24
kc705.py
24
kc705.py
@ -53,14 +53,14 @@ _usb3_io = [
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# CRG ----------------------------------------------------------------------------------------------
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class _CRG(Module):
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def __init__(self, platform, sys_clk_freq):
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def __init__(self, platform, refclk62p5, sys_clk_freq):
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self.clock_domains.cd_sys = ClockDomain()
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self.clock_domains.cd_usb3_oob = ClockDomain()
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# # #
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self.submodules.pll = pll = S7PLL(speedgrade=-2)
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pll.register_clkin(platform.request("clk156"), 156.5e6)
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pll.register_clkin(refclk62p5, 62.5e6)
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pll.create_clkout(self.cd_sys, sys_clk_freq)
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pll.create_clkout(self.cd_usb3_oob, sys_clk_freq/8)
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@ -69,11 +69,25 @@ class _CRG(Module):
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class USB3SoC(SoCMini):
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def __init__(self, platform, connector="pcie", with_etherbone=True, with_analyzer=True):
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sys_clk_freq = int(156.5e6)
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sys_clk_freq = int(125e6)
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SoCMini.__init__(self, platform, sys_clk_freq, ident="USB3SoC", ident_version=True)
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# 125MHz RefClk ----------------------------------------------------------------------------
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sgmii_clk = platform.request("sgmii_clock")
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refclk125 = Signal()
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refclk62p5 = Signal()
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self.specials += [
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Instance("IBUFDS_GTE2",
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i_CEB = 0,
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i_I = sgmii_clk.p,
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i_IB = sgmii_clk.n,
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o_O = refclk125,
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o_ODIV2 = refclk62p5,
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)
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]
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# CRG --------------------------------------------------------------------------------------
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self.submodules.crg = _CRG(platform, sys_clk_freq)
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self.submodules.crg = _CRG(platform, refclk62p5, sys_clk_freq)
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# Ethernet <--> Wishbone -------------------------------------------------------------------
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if with_etherbone:
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@ -109,7 +123,7 @@ class USB3SoC(SoCMini):
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usb3_serdes = K7USB3SerDes(platform,
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sys_clk = self.crg.cd_sys.clk,
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sys_clk_freq = sys_clk_freq,
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refclk_pads = platform.request("sgmii_clock"),
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refclk_pads = refclk125,
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refclk_freq = 125e6,
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tx_pads = platform.request(connector + "_tx"),
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rx_pads = platform.request(connector + "_rx"))
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