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scrambling: document
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@ -8,10 +8,14 @@ from migen import *
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from litex.soc.interconnect import stream
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# Scrambler Unit -----------------------------------------------------------------------------------
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# Scrambler Unit (Appendix B) ----------------------------------------------------------------------
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@CEInserter()
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class ScramblerUnit(Module):
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"""Scrambler Unit
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This module generates the scrambled datas for the USB3.0 link (X^16 + X^5 + X^4 + X^3 + 1 polynom).
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"""
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def __init__(self):
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self.value = Signal(32)
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@ -73,9 +77,13 @@ class ScramblerUnit(Module):
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]
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self.sync += cur.eq(new)
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# Scrambler ----------------------------------------------------------------------------------------
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# Scrambler (Appendix B) ---------------------------------------------------------------------------
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class Scrambler(Module):
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"""Scrambler
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This module scrambles the TX data/ctrl stream. K codes shall not be scrambled.
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"""
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def __init__(self):
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self.sink = sink = stream.Endpoint([("data", 32), ("ctrl", 4)])
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self.source = source = stream.Endpoint([("data", 32), ("ctrl", 4)])
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@ -95,9 +103,15 @@ class Scrambler(Module):
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)
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]
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# Descrambler (Scrambler + Auto-Synchronization) ---------------------------------------------------
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# Descrambler (Scrambler + Auto-Synchronization) (Appendix B) --------------------------------------
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class Descrambler(Module):
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"""Descrambler
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This module descrambles the RX data/ctrl stream. K codes shall not be scrambled. The descrambler
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automatically synchronize itself to the incoming stream during the Idle handshake sequence. Once
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synchronized, it will keep the current synchronization until the next reset/Idle handshake sequence.
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"""
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def __init__(self):
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self.sink = sink = stream.Endpoint([("data", 32), ("ctrl", 4)])
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self.source = source = stream.Endpoint([("data", 32), ("ctrl", 4)])
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