FPGA/usb3_pipe
1
0
Fork 0
mirror of https://github.com/enjoy-digital/usb3_pipe.git synced 2025-01-04 10:18:41 +08:00
Code Issues Projects Releases Wiki Activity

README: Fix typos/omissions.

Browse Source
This commit is contained in:
Florent Kermarrec 2022-04-26 16:25:07 +02:00
parent b89ca5fa81
commit d5cccbb8ff
1 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
README.md
View File

@ -12,7 +12,7 @@
[> Intro
--------
![](doc/acorn_baseboard_sfp2usb_1.jpg)
![](doc/acorn_baseboard_sfp2usb_0.jpg)
The aim of this project is to experiment with [High Speed Transceivers (SERDES)](https://en.wikipedia.org/wiki/Multi-gigabit_transceiver) of popular FPGAs to create a [USB3.0 PIPE interface](https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/phy-interface-pci-express-sata-usb30-architectures-3.1.pdf).
@ -30,7 +30,7 @@ One of the following boards:
- [KC705](https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html)
- [LiteX Acorn Baseboard](https://github.com/enjoy-digital/litex-acorn-baseboard)
paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) from [XillyUSB](http://xillybus.com/xillyusb) project:
paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) borrowed from [XillyUSB](http://xillybus.com/xillyusb) project:
![LiteX Acorn Baseboard + SFP2USB](doc/acorn_baseboard_sfp2usb_2.jpg)
@ -38,6 +38,8 @@ paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) from [XillyUSB](ht
![PCIsh-to-USB3.0](doc/breakout_board.jpg)
**Note:** Any 7-Series board with a SFP or PCIe connector with also be suitable but will require creating a platform/target file if not already supported in [LiteX-Boards](https://github.com/litex-hub/litex-boards).
[> Toolchain
------------
This project targets Xilinx Vivado for Kintex7 / Artix7 support. In the future, it should also be possible to use [F4PGA](https://f4pga.org/) toolchains to build the design.