From d5cccbb8ff8d10d04279d44261b0caa309236a05 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 26 Apr 2022 16:25:07 +0200 Subject: [PATCH] README: Fix typos/omissions. --- README.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 44d5134..97775e8 100644 --- a/README.md +++ b/README.md @@ -12,7 +12,7 @@ [> Intro -------- -![](doc/acorn_baseboard_sfp2usb_1.jpg) +![](doc/acorn_baseboard_sfp2usb_0.jpg) The aim of this project is to experiment with [High Speed Transceivers (SERDES)](https://en.wikipedia.org/wiki/Multi-gigabit_transceiver) of popular FPGAs to create a [USB3.0 PIPE interface](https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/phy-interface-pci-express-sata-usb30-architectures-3.1.pdf). @@ -30,7 +30,7 @@ One of the following boards: - [KC705](https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html) - [LiteX Acorn Baseboard](https://github.com/enjoy-digital/litex-acorn-baseboard) -paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) from [XillyUSB](http://xillybus.com/xillyusb) project: +paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) borrowed from [XillyUSB](http://xillybus.com/xillyusb) project: ![LiteX Acorn Baseboard + SFP2USB](doc/acorn_baseboard_sfp2usb_2.jpg) @@ -38,6 +38,8 @@ paired with the [SFP2USB](http://xillybus.com/sfp2usb-module) from [XillyUSB](ht ![PCIsh-to-USB3.0](doc/breakout_board.jpg) + **Note:** Any 7-Series board with a SFP or PCIe connector with also be suitable but will require creating a platform/target file if not already supported in [LiteX-Boards](https://github.com/litex-hub/litex-boards). + [> Toolchain ------------ This project targets Xilinx Vivado for Kintex7 / Artix7 support. In the future, it should also be possible to use [F4PGA](https://f4pga.org/) toolchains to build the design.