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usb3_pipe/core: add optional endianness_swap on sink/source streams

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This commit is contained in:
Florent Kermarrec 2019-12-03 23:00:45 +01:00
parent 99601e9d1a
commit f2e20c64ab
1 changed files with 17 additions and 5 deletions
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22
usb3_pipe/core.py
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@ -5,6 +5,7 @@ from migen import *
from litex.soc.interconnect import stream
from usb3_pipe.common import *
from usb3_pipe.lfps import LFPSUnit
from usb3_pipe.training import TSUnit
from usb3_pipe.ltssm import LTSSM
@ -15,7 +16,7 @@ from usb3_pipe.serdes import RXWordAligner
@ResetInserter()
class USB3PIPE(Module):
def __init__(self, serdes, sys_clk_freq, with_scrambling=True):
def __init__(self, serdes, sys_clk_freq, with_scrambling=True, with_endianness_swap=True):
assert sys_clk_freq > 125e6
self.ready = Signal() # o
@ -24,6 +25,17 @@ class USB3PIPE(Module):
# # #
# Endianness Swap --------------------------------------------------------------------------
if with_endianness_swap:
sink = stream.Endpoint([("data", 32), ("ctrl", 4)])
source = stream.Endpoint([("data", 32), ("ctrl", 4)])
sink_swap = EndiannessSwap(self.sink, sink)
source_swap = EndiannessSwap(source, self.source)
self.submodules += sink_swap, source_swap
else:
sink = self.sink
source = self.source
# LFPS -------------------------------------------------------------------------------------
lfps = LFPSUnit(sys_clk_freq=sys_clk_freq, serdes=serdes)
self.submodules.lfps = lfps
@ -44,7 +56,7 @@ class USB3PIPE(Module):
self.comb += scrambler.ce.eq(ltssm.polling.tx_ready)
self.submodules.scrambler = scrambler
self.comb += [
self.sink.connect(scrambler.sink),
sink.connect(scrambler.sink),
If(ltssm.polling.tx_ready, scrambler.source.connect(serdes.sink))
]
@ -57,8 +69,8 @@ class USB3PIPE(Module):
self.comb += [
If(ltssm.polling.rx_ready, serdes.source.connect(aligner.sink)),
aligner.source.connect(descrambler.sink),
descrambler.source.connect(self.source),
descrambler.source.connect(source),
]
else:
self.comb += If(ltssm.polling.tx_ready, self.sink.connect(serdes.sink))
self.comb += If(ltssm.polling.rx_ready, serdes.source.connect(self.source))
self.comb += If(ltssm.polling.tx_ready, sink.connect(serdes.sink))
self.comb += If(ltssm.polling.rx_ready, serdes.source.connect(source))