Florent Kermarrec
|
630ce0edd1
|
scrambling: add enable
|
2019-10-10 10:51:14 +02:00 |
|
Florent Kermarrec
|
01a942ca7b
|
scrambling: don't scramble K codes, only keep Scrambler (Descrambler is simular)
|
2019-10-10 10:50:02 +02:00 |
|
Florent Kermarrec
|
c39ed5f38c
|
core/USB3PIPE: integrate scrambler/descrambler
|
2019-10-10 10:35:01 +02:00 |
|
Florent Kermarrec
|
d27639c927
|
training/TSGenerator: pulse done signal on last generator cycle
|
2019-10-10 10:34:27 +02:00 |
|
Florent Kermarrec
|
1dc029fabc
|
sim: delay end of simulation to ease visualize the end on the trace
|
2019-10-10 09:42:09 +02:00 |
|
Florent Kermarrec
|
0957fc3958
|
sim: add display of polling fsm transitions
|
2019-10-10 09:33:03 +02:00 |
|
Florent Kermarrec
|
2b2f74c4dd
|
test/test_training: fix
|
2019-10-09 19:18:35 +02:00 |
|
Florent Kermarrec
|
104b62390d
|
README.md: center logo, add Migen/LiteX
|
2019-10-09 19:17:06 +02:00 |
|
Florent Kermarrec
|
1bd83c3ea4
|
sim/lfps: now working in simulation
|
2019-10-09 19:03:18 +02:00 |
|
Florent Kermarrec
|
8803c75bbd
|
sim/ltssm: rework/simplify polling fsm, going to polling idle in simulation
|
2019-10-09 18:40:05 +02:00 |
|
Florent Kermarrec
|
05e30be3ee
|
sim: add Host/Device USB3 PIPE
|
2019-10-09 12:55:16 +02:00 |
|
Florent Kermarrec
|
c77296f798
|
serdes: add USB3SerDesModel
|
2019-10-09 12:54:36 +02:00 |
|
Florent Kermarrec
|
f43b3a4c8b
|
add litex/verilator sim skeleton
|
2019-10-09 12:49:00 +02:00 |
|
Florent Kermarrec
|
9c4af5ff69
|
training: add tseq/ts1 generator (to be able to simulate the host, will be simplified at synthesis is not used)
|
2019-10-09 12:32:30 +02:00 |
|
Florent Kermarrec
|
8b5e07e3c9
|
add __init__.py to simplify imports
|
2019-10-09 12:17:30 +02:00 |
|
Florent Kermarrec
|
8bef6fcbc6
|
rename phy to core and USB3PHY to USB3PIPE
|
2019-10-09 12:12:48 +02:00 |
|
Florent Kermarrec
|
f763c282ea
|
serdes: fix typo
|
2019-10-09 12:12:16 +02:00 |
|
Florent Kermarrec
|
eba5d552fb
|
README.md: update
|
2019-10-08 19:35:13 +02:00 |
|
Florent Kermarrec
|
6c6717daef
|
kc705: add Scrambler and enable it when in polling.idle (experiment)
|
2019-10-08 18:58:50 +02:00 |
|
Florent Kermarrec
|
e9ef2876f5
|
serdes: fix typo
|
2019-10-08 18:26:38 +02:00 |
|
Florent Kermarrec
|
972c94f0b2
|
scrambling/FIXME: SKP(Skip) symbols are no longer present in the stream (removed with SerdesRXSkipRemover)
|
2019-10-08 18:12:41 +02:00 |
|
Florent Kermarrec
|
798e1b9b28
|
serdes: integrate SerdesRXSkipRemover
|
2019-10-08 18:09:13 +02:00 |
|
Florent Kermarrec
|
5f869f0ddb
|
serdes: add SerdesRXSkipRemover
|
2019-10-08 18:06:30 +02:00 |
|
Florent Kermarrec
|
6fe7a56b6b
|
kc705: add idle handshake start trigger
|
2019-10-08 15:06:49 +02:00 |
|
Florent Kermarrec
|
949a8628e7
|
targets: use new automatic rx polarity swap (tx polarity if needed, will be detected by the host)
|
2019-10-08 14:12:21 +02:00 |
|
Florent Kermarrec
|
5becb9be6d
|
ltssm/phy: add experimental RX polarity swap (simplify testing)
|
2019-10-08 14:10:49 +02:00 |
|
Florent Kermarrec
|
7a31882f38
|
training: connect rx_ts signals
|
2019-10-08 13:07:26 +02:00 |
|
Florent Kermarrec
|
7bfd22de78
|
training: be sure to only assert detected one cycle
|
2019-10-08 12:21:06 +02:00 |
|
Florent Kermarrec
|
68b726be80
|
tools/test_analyzer: add rx_tseq_first_word trigger
|
2019-10-08 12:13:06 +02:00 |
|
Florent Kermarrec
|
8a876f9414
|
training: add enable signals
|
2019-10-08 12:12:40 +02:00 |
|
Florent Kermarrec
|
b138f0fc2e
|
targets: set polarity and use a common analyzer
|
2019-10-08 11:29:39 +02:00 |
|
Florent Kermarrec
|
362fe4f444
|
control serdes.rx_align, use default value of 1 on enable controls
|
2019-10-08 10:53:52 +02:00 |
|
Florent Kermarrec
|
6ebe23f17b
|
serdes: rename SerdesRXAligner to SerdesRXWordAligner
|
2019-10-08 10:40:58 +02:00 |
|
Florent Kermarrec
|
ec3b7e9c57
|
serdes: simplify SerdesRXAligner
|
2019-10-08 10:02:33 +02:00 |
|
Florent Kermarrec
|
537074d942
|
test/test_serdes: add test_aligner
|
2019-10-08 09:53:53 +02:00 |
|
Florent Kermarrec
|
c7c968fcb5
|
tets: add test_serdes with test_datapath_loopback
|
2019-10-08 09:42:29 +02:00 |
|
Florent Kermarrec
|
0632d128b7
|
pcie_screamer: increase sys_clk_freq to 133MHz (have to be > 125MHz)
|
2019-10-08 09:08:08 +02:00 |
|
Florent Kermarrec
|
4d76cd757c
|
test: remove .vcd generation
|
2019-10-08 09:07:10 +02:00 |
|
Florent Kermarrec
|
bdf61f9e40
|
rename ordered_set to training
|
2019-10-08 09:06:08 +02:00 |
|
Florent Kermarrec
|
68c09044a7
|
add phy module and use it in targets
|
2019-10-08 08:50:13 +02:00 |
|
Florent Kermarrec
|
d6961125bc
|
scrambler: rename to scrambling, add Descrambler list features that still needs to be implemented
|
2019-10-08 08:33:43 +02:00 |
|
Florent Kermarrec
|
091fa089fc
|
test/test_ltssm: comment test_polling_fsm_synta for now
|
2019-10-07 23:39:28 +02:00 |
|
Florent Kermarrec
|
05059ea9ac
|
targets: use LFPSUnit, OrderedSertUnit, LTSSM, simplify
|
2019-10-07 23:33:08 +02:00 |
|
Florent Kermarrec
|
03843d36c3
|
ltssm: start filling Polling FSM
|
2019-10-07 23:30:22 +02:00 |
|
Florent Kermarrec
|
50df4995bb
|
ordered_set/OrderedSetUnit: add control signals
|
2019-10-07 22:46:02 +02:00 |
|
Florent Kermarrec
|
b46f0108e4
|
ordered_set: only keep 32-bit data-width
|
2019-10-07 22:36:04 +02:00 |
|
Florent Kermarrec
|
409466fb91
|
lfps/LFPSUnit: add control signals, use 20-bit data-width
|
2019-10-07 22:29:24 +02:00 |
|
Florent Kermarrec
|
c2c126247b
|
usb3_pipe: add LFPSUnit, OrderedSetUnit and LTSSM skeletons, rename Receiver/Transmitter to Checker/Generator
|
2019-10-07 19:26:52 +02:00 |
|
Florent Kermarrec
|
790ff574ff
|
add travis-ci
|
2019-10-07 18:24:22 +02:00 |
|
Florent Kermarrec
|
a62fcd090c
|
test/test_scrambler: add reference and test against it
|
2019-10-07 18:22:18 +02:00 |
|