Florent Kermarrec
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bcf2bf8ce6
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training: document
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2019-12-13 12:56:17 +01:00 |
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Florent Kermarrec
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e0219b55bf
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ltssm: move note to LTSSMFSM, SSInactiveFSM and RXDetectFSM
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2019-12-13 12:38:10 +01:00 |
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Florent Kermarrec
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292076b4e6
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common: document
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2019-12-13 12:34:15 +01:00 |
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Florent Kermarrec
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b49a928f21
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scrambling: document
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2019-12-13 12:18:46 +01:00 |
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Florent Kermarrec
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1147f23080
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usb3_pipe/lfps: document and make LFPSChecker/Generator generic.
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2019-12-13 11:57:03 +01:00 |
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Florent Kermarrec
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34d201e208
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target: uniformize features/behavior between targets
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2019-12-13 10:28:05 +01:00 |
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Florent Kermarrec
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a0e978a0ef
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pcie_screamer: use LiteX's platform
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2019-12-13 10:18:13 +01:00 |
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Florent Kermarrec
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75c2eef7a8
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targets/serdes: cleanup and remove keep attributes (now directly added when applying constraints to signals
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2019-12-13 10:13:46 +01:00 |
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Florent Kermarrec
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359c3b0f1a
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serdes: rename usb3_oob clock domain to oob
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2019-12-13 08:44:57 +01:00 |
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Florent Kermarrec
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0019f05df4
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kc705: use simulare clocking than others targets
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2019-12-13 08:39:06 +01:00 |
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Florent Kermarrec
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6e12c8f0f3
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pcie_screamer: reduce sys_clk_freq to 125MHz (synchronous with the 250MHz tx clk since generated from the same clk source)
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2019-12-13 08:23:50 +01:00 |
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Florent Kermarrec
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7bdd251c02
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versa_ecp5: reduce sys_clk_freq to 125MHz (synchronous with the 250MHz tx clk since generated from the same clk source)
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2019-12-09 18:04:45 +01:00 |
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Florent Kermarrec
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b553eb3185
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usb3_pipe/core/serdes: improve timings
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2019-12-09 17:46:45 +01:00 |
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Florent Kermarrec
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e798d9b9ca
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usb3_pipe/scrambling: simplify code, improve timings
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2019-12-09 17:30:55 +01:00 |
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Florent Kermarrec
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28b54d5c64
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usb3_pipe/core: move aligner to usb3_core, optimize timings
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2019-12-09 16:51:48 +01:00 |
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Florent Kermarrec
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021d2ed9f2
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versa_ecp5: leds are active low, remove refclk control signals (refclk is generated from pll)
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2019-12-09 16:18:32 +01:00 |
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Florent Kermarrec
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ca6ea3ae43
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usb3_core: allow disabling endpoint (to speed-up compilation)
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2019-12-09 15:56:14 +01:00 |
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Florent Kermarrec
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838a04f005
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serdes/ECP5USB3SerDes: add missing rx_idle/tx_idle connections
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2019-12-09 12:37:29 +01:00 |
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Florent Kermarrec
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26b476567f
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targets: copy usb3 .init files to build/gateware
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2019-12-09 10:25:54 +01:00 |
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Florent Kermarrec
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d5f7e97aad
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versa_ecp5: use channel 1 when sma connector is use (sma is use to observe lfps with a scope)
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2019-12-09 09:58:15 +01:00 |
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Florent Kermarrec
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6b2c27e230
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versa_ecp5: generate 200MHz refclk from PLL
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2019-12-05 19:34:07 +01:00 |
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Florent Kermarrec
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9440d7a47e
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ltssm: PollingFSM add transitions to Polling.Active/Polling.Entry to retrain link on error.
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2019-12-05 18:27:50 +01:00 |
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Florent Kermarrec
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22f8652c91
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core: use ResetInserter on Scrambler/Descrambler to allow re-synchronization after recovery
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2019-12-05 18:14:51 +01:00 |
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Florent Kermarrec
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6abd6fb34b
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ltssm: remove 1s timer of Polling.Idle state
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2019-12-05 16:53:30 +01:00 |
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Florent Kermarrec
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4eb080f405
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serdes: get back to simple TXSKPInserter (it seems to be enough since new implementation does not improve system behavior)
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2019-12-05 15:26:05 +01:00 |
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Florent Kermarrec
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7dada07257
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serdes/TXSKPInserter: remove limitation and inject 1 SKP OrderedSet every 88 Data/Ctrl words.
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2019-12-05 15:12:50 +01:00 |
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Florent Kermarrec
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ed13585466
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serdes: rename RXSkipPRemover/TXSkipInserter to RXSKPRemover/TXSKPInserter
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2019-12-05 12:07:06 +01:00 |
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Florent Kermarrec
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22fc42a9b9
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training: add ts1_inv_checker and use it to detect rx polarity
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2019-12-04 21:01:27 +01:00 |
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Florent Kermarrec
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c071f56abd
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kc705: add sma pins (useful for LFPS observation with a scope)
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2019-12-04 17:36:02 +01:00 |
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Florent Kermarrec
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d735f692f9
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serdes/TXSkipInserter: 88*2 = 176...
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2019-12-04 17:08:42 +01:00 |
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Florent Kermarrec
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cc1bb1d0ae
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usb3_core: fix out_stall direction
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2019-12-04 16:13:35 +01:00 |
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Florent Kermarrec
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9369abba69
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kc705: revert clocking (back-pressure on the USB3-core is now handled by a FIFO)
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2019-12-04 11:37:29 +01:00 |
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Florent Kermarrec
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f9a7369e8d
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usb3_core/core: cleanup
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2019-12-04 11:10:15 +01:00 |
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Florent Kermarrec
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176617fb84
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usb3_core/core: generate first/last packets delimiters from out_active signals
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2019-12-04 09:44:36 +01:00 |
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Florent Kermarrec
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b50e292978
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common/EndiannessSwap: fix ctrl
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2019-12-04 08:39:55 +01:00 |
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Florent Kermarrec
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c0d6c815c7
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tools/test_analyzer: accomodate signals' name changes
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2019-12-04 08:03:18 +01:00 |
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Florent Kermarrec
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4410383f89
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usb3_pipe/core: sys_clk_freq >= 125MHz
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2019-12-04 07:45:16 +01:00 |
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Florent Kermarrec
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27e6f389c8
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kc705: generate sys_clk from the same clock source used for clocking the transceiver (to avoid backpressure issues with daisho core)
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2019-12-04 07:44:04 +01:00 |
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Florent Kermarrec
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f2e20c64ab
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usb3_pipe/core: add optional endianness_swap on sink/source streams
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2019-12-03 23:00:45 +01:00 |
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Florent Kermarrec
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99601e9d1a
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usb3_pipe/common: add EndiannessSwap module
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2019-12-03 22:59:59 +01:00 |
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Florent Kermarrec
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e708bdd94b
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serdes/ECP5USB3SerDes: connect tx_polarity
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2019-11-29 15:20:47 +01:00 |
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Florent Kermarrec
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fe494fccda
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sim: make phy_dw configurable
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2019-11-29 14:45:00 +01:00 |
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Florent Kermarrec
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ac4756e7a9
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serdes/Datapath: add phy_dw parameter
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2019-11-29 14:44:36 +01:00 |
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Florent Kermarrec
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0081f1f9ca
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serdes/ECP5USB3SerDes: connect rx_polarity
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2019-11-29 14:32:36 +01:00 |
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Florent Kermarrec
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8cb9cfd6ee
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sim: add trace-start/trace-end
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2019-11-29 13:56:35 +01:00 |
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Florent Kermarrec
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56811680a2
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usb3_core: make sure we generate the USB3 descriptors before the build or simulation
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2019-11-29 13:00:15 +01:00 |
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Florent Kermarrec
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31dfa3983b
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usb3_core/daisho: add basic Makefile
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2019-11-29 12:55:49 +01:00 |
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Florent Kermarrec
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457f16420b
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versa_ecp5: integrate USB3Core
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2019-11-27 18:41:33 +01:00 |
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Florent Kermarrec
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35f846bafa
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pcie_screamer: update analyzer
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2019-11-27 18:38:34 +01:00 |
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Florent Kermarrec
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a51a7d970c
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versa_ecp5/CRG: add power on reset
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2019-11-27 18:20:53 +01:00 |
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