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FPGA
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usb3_pipe
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https://github.com/enjoy-digital/usb3_pipe.git
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usb3_pipe
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test
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Florent Kermarrec
445d8d183c
serdes: document, rename SerdesTXDatapath/SerdesRXDatapath to TXDatapath/RXDatapath
2019-12-13 14:56:25 +01:00
..
__init__.py
add ltssm with polling fsm skeleton
2019-09-27 06:38:32 +02:00
test_lfps.py
usb3_pipe/lfps: document and make LFPSChecker/Generator generic.
2019-12-13 11:57:03 +01:00
test_ltssm.py
test/test_ltssm: comment test_polling_fsm_synta for now
2019-10-07 23:39:28 +02:00
test_scrambling.py
usb3_pipe/scrambling: simplify code, improve timings
2019-12-09 17:30:55 +01:00
test_serdes.py
serdes: document, rename SerdesTXDatapath/SerdesRXDatapath to TXDatapath/RXDatapath
2019-12-13 14:56:25 +01:00
test_training.py
training: add first/last delimiters
2019-11-21 14:39:39 +01:00
