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FPGA
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usb3_pipe
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https://github.com/enjoy-digital/usb3_pipe.git
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2025-01-04 10:18:41 +08:00
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usb3_pipe
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test
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Florent Kermarrec
7bfd22de78
training: be sure to only assert detected one cycle
2019-10-08 12:21:06 +02:00
..
__init__.py
add ltssm with polling fsm skeleton
2019-09-27 06:38:32 +02:00
test_lfps.py
test: remove .vcd generation
2019-10-08 09:07:10 +02:00
test_ltssm.py
test/test_ltssm: comment test_polling_fsm_synta for now
2019-10-07 23:39:28 +02:00
test_scrambling.py
scrambler: rename to scrambling, add Descrambler list features that still needs to be implemented
2019-10-08 08:33:43 +02:00
test_serdes.py
serdes: rename SerdesRXAligner to SerdesRXWordAligner
2019-10-08 10:40:58 +02:00
test_training.py
training: be sure to only assert detected one cycle
2019-10-08 12:21:06 +02:00