FPGA/usbcorev
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4 Commits

Author SHA1 Message Date
Martin Vejnár
aa908996d8 Fixed handshake race. 2014-09-07 00:24:18 +02:00
Martin Vejnár
a44dc24dd0 No more vendor specific components. 
Input and output is now done via design-treated j/se0 signals;
it is up to the design to tread input for metastability.
 2013-07-05 18:01:04 +02:00
Martin Vejnár
e407f26ea6 Latch handshake on success. 2013-06-09 10:56:02 +02:00
Martin Vejnár
fb2e32dc58 Initial commit. 
The module works correctly during USB enumeration, no more tests were
performed at this point. No documentation or tests.
 2013-05-10 19:51:51 +02:00