mirror of
https://github.com/alexforencich/verilog-axi.git
synced 2025-01-14 06:42:55 +08:00
59d37ee850
Signed-off-by: Alex Forencich <alex@alexforencich.com>
427 lines
12 KiB
Python
427 lines
12 KiB
Python
"""
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Copyright (c) 2023 Alex Forencich
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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"""
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import itertools
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import logging
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import os
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import cocotb_test.simulator
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import pytest
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import cocotb
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from cocotb.queue import Queue
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from cocotb.clock import Clock
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from cocotb.triggers import RisingEdge, Event
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from cocotb.regression import TestFactory
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from cocotb_bus.bus import Bus
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from cocotbext.axi import AxiStreamBus, AxiStreamFrame, AxiStreamSource
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class BaseBus(Bus):
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_signals = ["data"]
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_optional_signals = []
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def __init__(self, entity=None, prefix=None, **kwargs):
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super().__init__(entity, prefix, self._signals, optional_signals=self._optional_signals, **kwargs)
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@classmethod
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def from_entity(cls, entity, **kwargs):
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return cls(entity, **kwargs)
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@classmethod
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def from_prefix(cls, entity, prefix, **kwargs):
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return cls(entity, prefix, **kwargs)
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class DataBus(BaseBus):
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_signals = ["data", "valid", "ready"]
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class DataSink:
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def __init__(self, bus, clock, reset=None, watermark=None, *args, **kwargs):
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self.bus = bus
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self.clock = clock
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self.reset = reset
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self.watermark = watermark
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self.log = logging.getLogger(f"cocotb.{bus._entity._name}.{bus._name}")
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self.pause = False
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self._pause_generator = None
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self._pause_cr = None
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self.enqueue_event = Event()
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self.watermark_level = 0
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self.width = len(self.bus.data)
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self.byte_size = 8
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self.byte_lanes = self.width // self.byte_size
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self.seg_count = len(self.bus.valid)
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self.seg_data_width = self.width // self.seg_count
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self.seg_byte_lanes = self.seg_data_width // self.byte_size
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self.seg_data_mask = 2**self.seg_data_width-1
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# queue per segment
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self.queue = [Queue() for x in range(self.seg_count)]
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self.read_queue = bytearray()
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self.bus.data.setimmediatevalue(0)
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self.bus.valid.setimmediatevalue(0)
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cocotb.start_soon(self._run())
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def set_pause_generator(self, generator=None):
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if self._pause_cr is not None:
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self._pause_cr.kill()
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self._pause_cr = None
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self._pause_generator = generator
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if self._pause_generator is not None:
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self._pause_cr = cocotb.start_soon(self._run_pause())
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def clear_pause_generator(self):
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self.set_pause_generator(None)
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def empty(self):
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for queue in self.queue:
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if not queue.empty():
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return False
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return True
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def clear(self):
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for queue in self.queue:
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while not queue.empty():
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_ = queue.get_nowait()
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self.read_queue.clear()
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def _read_queues(self):
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while True:
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for queue in self.queue:
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if queue.empty():
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return
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for queue in self.queue:
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self.read_queue.extend(queue.get_nowait())
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async def read(self, count=-1):
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self._read_queues()
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while not self.read_queue:
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self.enqueue_event.clear()
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await self.enqueue_event.wait()
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self._read_queues()
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return self.read_nowait(count)
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def read_nowait(self, count=-1):
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self._read_queues()
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if count < 0:
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count = len(self.read_queue)
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data = self.read_queue[:count]
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del self.read_queue[:count]
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return data
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async def _run(self):
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data_sample = 0
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valid_sample = 0
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ready = 0
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watermark = 0
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has_ready = self.bus.ready is not None
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has_watermark = self.watermark is not None
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clock_edge_event = RisingEdge(self.clock)
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while True:
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await clock_edge_event
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valid_sample = self.bus.valid.value.integer
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if valid_sample:
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data_sample = self.bus.data.value.integer
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if self.reset is not None and self.reset.value:
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if has_ready:
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self.bus.ready.setimmediatevalue(0)
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ready = 0
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continue
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# process segments
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watermark = 0
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for seg in range(self.seg_count):
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seg_mask = 1 << seg
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if (ready & seg_mask or not has_ready) and (valid_sample & seg_mask):
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data = (data_sample >> self.seg_data_width*seg) & self.seg_data_mask
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data = data.to_bytes(self.seg_byte_lanes, 'little')
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self.queue[seg].put_nowait(data)
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self.enqueue_event.set()
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self.log.info("RX seg: %d data: %s", seg, data)
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if has_watermark and self.watermark_level > 0 and self.queue[seg].qsize() > self.watermark_level:
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watermark = 1
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ready = 2**self.seg_count-1
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if self.pause:
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ready = 0
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watermark = 1
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if has_ready:
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self.bus.ready.value = ready
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if has_watermark:
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self.watermark.value = watermark
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async def _run_pause(self):
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clock_edge_event = RisingEdge(self.clock)
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for val in self._pause_generator:
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self.pause = val
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await clock_edge_event
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class TB(object):
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def __init__(self, dut):
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self.dut = dut
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.DEBUG)
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cocotb.start_soon(Clock(dut.clk, 10, units="ns").start())
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# streaming data in
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self.source = AxiStreamSource(AxiStreamBus.from_prefix(dut, "s_axis"), dut.clk, dut.rst)
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# streaming data out
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self.sink = DataSink(DataBus.from_prefix(dut, "output"), dut.clk, dut.rst, dut.fifo_watermark_in)
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dut.fifo_rst_in.value = 0
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def set_idle_generator(self, generator=None):
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if generator:
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self.source.set_pause_generator(generator())
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def set_backpressure_generator(self, generator=None):
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if generator:
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self.sink.set_pause_generator(generator())
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async def reset(self):
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self.dut.rst.setimmediatevalue(0)
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for k in range(10):
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await RisingEdge(self.dut.clk)
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self.dut.rst.value = 1
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for k in range(10):
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await RisingEdge(self.dut.clk)
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self.dut.rst.value = 0
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for k in range(10):
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await RisingEdge(self.dut.clk)
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async def reset_fifo(self):
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self.dut.fifo_rst_in.setimmediatevalue(0)
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for k in range(10):
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await RisingEdge(self.dut.clk)
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self.dut.fifo_rst_in.value = 1
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for k in range(10):
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await RisingEdge(self.dut.clk)
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self.dut.fifo_rst_in.value = 0
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for k in range(10):
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await RisingEdge(self.dut.clk)
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async def run_test(dut, payload_lengths=None, payload_data=None, space=False, idle_inserter=None, backpressure_inserter=None):
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tb = TB(dut)
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id_width = len(tb.source.bus.tid)
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dest_width = len(tb.source.bus.tdest)
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user_width = len(tb.source.bus.tuser)
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seg_cnt = tb.sink.seg_count
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seg_byte_lanes = tb.sink.seg_byte_lanes
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meta_id_offset = 0
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meta_dest_offset = meta_id_offset + id_width
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meta_user_offset = meta_dest_offset + dest_width
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meta_width = meta_user_offset + user_width
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hdr_size = (16 + meta_width + 7) // 8
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id_count = 2**id_width
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cur_id = 1
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await tb.reset()
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tb.set_idle_generator(idle_inserter)
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tb.set_backpressure_generator(backpressure_inserter)
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test_frames = []
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for test_data in [payload_data(x) for x in payload_lengths()]:
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test_frame = AxiStreamFrame(test_data)
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test_frame.tid = cur_id
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test_frame.tdest = cur_id
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await tb.source.send(test_frame)
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test_frames.append(test_frame)
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cur_id = (cur_id + 1) % id_count
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if space:
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for k in range(1000):
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await RisingEdge(dut.clk)
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for test_frame in test_frames:
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rx_frame = AxiStreamFrame()
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while True:
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# read block
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block = await tb.sink.read(seg_byte_lanes)
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# print(block)
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# extract header
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hdr = int.from_bytes(block[0:hdr_size], 'little')
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# print(hex(hdr))
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# check parity bits
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assert bool(hdr & 0x4) == bool(bin(hdr & 0x0003).count("1") & 1)
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assert bool(hdr & 0x8) == bool(bin(hdr & 0xfff0).count("1") & 1)
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if not hdr & 1:
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# null block, skip
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continue
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length = ((hdr >> 4) & 0xfff)+1
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meta = hdr >> 16
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rx_frame.tid = (meta >> meta_id_offset) & (2**id_width-1)
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rx_frame.tdest = (meta >> meta_dest_offset) & (2**dest_width-1)
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rx_frame.tuser = (meta >> meta_user_offset) & (2**user_width-1)
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data = block[hdr_size:]
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while len(data) < length:
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block = await tb.sink.read(seg_byte_lanes)
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data.extend(block)
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if len(data) >= length:
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rx_frame.tdata.extend(data[0:length])
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if hdr & 0x2:
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break
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print(rx_frame)
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assert rx_frame == test_frame
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# assert tb.sink.empty()
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for k in range(1000):
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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await RisingEdge(dut.clk)
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def cycle_pause():
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return itertools.cycle([1, 1, 1, 0])
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def size_list():
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data_width = len(cocotb.top.s_axis_tdata)
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byte_width = data_width // 8
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return list(range(1, byte_width*4+1))+list(range(byte_width, 2**14, byte_width))+[1]*64
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def incrementing_payload(length):
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return bytearray(itertools.islice(itertools.cycle(range(256)), length))
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if cocotb.SIM_NAME:
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factory = TestFactory(run_test)
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factory.add_option("payload_lengths", [size_list])
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factory.add_option("payload_data", [incrementing_payload])
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factory.add_option("space", [False, True])
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factory.add_option("idle_inserter", [None, cycle_pause])
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factory.add_option("backpressure_inserter", [None, cycle_pause])
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factory.generate_tests()
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# cocotb-test
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tests_dir = os.path.abspath(os.path.dirname(__file__))
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rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
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@pytest.mark.parametrize(("axis_data_width", "seg_width", "seg_cnt"), [
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# (32, 32, 2),
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# (64, 256, 4),
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(512, 256, 4),
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])
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def test_axi_vfifo_enc(request, axis_data_width, seg_width, seg_cnt):
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dut = "axi_vfifo_enc"
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module = os.path.splitext(os.path.basename(__file__))[0]
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toplevel = dut
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verilog_sources = [
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os.path.join(rtl_dir, f"{dut}.v"),
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]
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parameters = {}
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parameters['SEG_WIDTH'] = seg_width
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parameters['SEG_CNT'] = seg_cnt
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parameters['AXIS_DATA_WIDTH'] = axis_data_width
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parameters['AXIS_KEEP_ENABLE'] = int(parameters['AXIS_DATA_WIDTH'] > 8)
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parameters['AXIS_KEEP_WIDTH'] = parameters['AXIS_DATA_WIDTH'] // 8
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parameters['AXIS_LAST_ENABLE'] = 1
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parameters['AXIS_ID_ENABLE'] = 1
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parameters['AXIS_ID_WIDTH'] = 8
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parameters['AXIS_DEST_ENABLE'] = 1
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parameters['AXIS_DEST_WIDTH'] = 8
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parameters['AXIS_USER_ENABLE'] = 1
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parameters['AXIS_USER_WIDTH'] = 1
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extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
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sim_build = os.path.join(tests_dir, "sim_build",
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request.node.name.replace('[', '-').replace(']', ''))
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cocotb_test.simulator.run(
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python_search=[tests_dir],
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verilog_sources=verilog_sources,
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toplevel=toplevel,
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module=module,
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parameters=parameters,
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sim_build=sim_build,
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extra_env=extra_env,
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)
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