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verilog-axi
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verilog-axi
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axil_reg_if
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Alex Forencich
5c2c6fd2bb
Add AXI lite register interface modules
2021-08-29 19:09:52 -07:00
..
Makefile
Add AXI lite register interface modules
2021-08-29 19:09:52 -07:00
test_axil_reg_if.py
Add AXI lite register interface modules
2021-08-29 19:09:52 -07:00