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https://github.com/alexforencich/verilog-ethernet.git
synced 2025-02-04 07:13:13 +08:00
Split out and pipeline relative timestamp LSB increment in PTP TD leaf clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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@ -284,15 +284,17 @@ reg [PERIOD_NS_W+FNS_W-1:0] period_ns_reg = 0, period_ns_next = 0;
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reg [9+CMP_FNS_W-1:0] dst_ns_capt_reg = 0;
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reg [9+CMP_FNS_W-1:0] dst_ns_capt_reg = 0;
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reg [9+CMP_FNS_W-1:0] src_ns_sync_reg = 0;
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reg [9+CMP_FNS_W-1:0] src_ns_sync_reg = 0;
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reg [FNS_W-1:0] ts_fns_lsb_reg = 0, ts_fns_lsb_next = 0;
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reg [FNS_W-1:0] ts_fns_reg = 0, ts_fns_next = 0;
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reg [FNS_W-1:0] ts_fns_reg = 0, ts_fns_next = 0;
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reg [8:0] ts_rel_ns_lsb_reg = 0, ts_rel_ns_lsb_next = 0;
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reg [TS_NS_W-1:0] ts_rel_ns_reg = 0, ts_rel_ns_next = 0;
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reg [TS_NS_W-1:0] ts_rel_ns_reg = 0, ts_rel_ns_next = 0;
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reg ts_tod_step_reg = 1'b0, ts_tod_step_next;
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reg ts_rel_step_reg = 1'b0, ts_rel_step_next;
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reg [TS_TOD_S_W-1:0] ts_tod_s_reg = 0, ts_tod_s_next = 0;
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reg [TS_TOD_S_W-1:0] ts_tod_s_reg = 0, ts_tod_s_next = 0;
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reg [TS_TOD_NS_W-1:0] ts_tod_ns_reg = 0, ts_tod_ns_next = 0;
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reg [TS_TOD_NS_W-1:0] ts_tod_ns_reg = 0, ts_tod_ns_next = 0;
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reg [8:0] ts_tod_offset_ns_reg = 0, ts_tod_offset_ns_next = 0;
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reg [8:0] ts_tod_offset_ns_reg = 0, ts_tod_offset_ns_next = 0;
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reg ts_rel_step_reg = 1'b0, ts_rel_step_next;
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reg ts_tod_step_reg = 1'b0, ts_tod_step_next;
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reg pps_reg = 1'b0, pps_next;
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reg pps_reg = 1'b0, pps_next;
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reg pps_str_reg = 1'b0, pps_str_next;
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reg pps_str_reg = 1'b0, pps_str_next;
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@ -641,8 +643,10 @@ assign locked = ptp_locked_reg && freq_locked_reg && dst_sync_locked_reg;
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always @* begin
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always @* begin
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period_ns_next = period_ns_reg;
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period_ns_next = period_ns_reg;
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ts_fns_lsb_next = ts_fns_lsb_reg;
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ts_fns_next = ts_fns_reg;
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ts_fns_next = ts_fns_reg;
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ts_rel_ns_lsb_next = ts_rel_ns_lsb_reg;
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ts_rel_ns_next = ts_rel_ns_reg;
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ts_rel_ns_next = ts_rel_ns_reg;
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ts_rel_step_next = 1'b0;
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ts_rel_step_next = 1'b0;
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@ -738,13 +742,18 @@ always @* begin
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// PTP clock
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// PTP clock
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// shared fractional ns
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// shared fractional ns and relative timestamp least significant bits
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ts_fns_next = ts_fns_reg + period_ns_reg;
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{ts_rel_ns_lsb_next, ts_fns_lsb_next} = ({ts_rel_ns_lsb_reg, ts_fns_lsb_reg} + period_ns_reg);
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ts_fns_next = ts_fns_lsb_reg;
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// relative timestamp
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// relative timestamp
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ts_rel_ns_next = ({ts_rel_ns_reg, ts_fns_reg} + period_ns_reg) >> FNS_W;
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ts_rel_ns_next[8:0] = ts_rel_ns_lsb_reg;
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if (TS_REL_EN) begin
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if (TS_REL_EN) begin
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if (!ts_rel_ns_next[8] && ts_rel_ns_reg[8]) begin
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ts_rel_ns_next[TS_REL_NS_W-1:9] = ts_rel_ns_reg[TS_REL_NS_W-1:9] + 1;
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end
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if (dst_update_reg && !dst_sync_reg && dst_rel_shadow_valid_reg && (dst_load_cnt_reg == 0)) begin
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if (dst_update_reg && !dst_sync_reg && dst_rel_shadow_valid_reg && (dst_load_cnt_reg == 0)) begin
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// check timestamp MSBs
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// check timestamp MSBs
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if (dst_rel_step_shadow_reg || ts_rel_load_ts_reg) begin
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if (dst_rel_step_shadow_reg || ts_rel_load_ts_reg) begin
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@ -774,9 +783,9 @@ always @* begin
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end
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end
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end
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end
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// absolute time-of-day timestamp
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if (TS_TOD_EN) begin
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if (TS_TOD_EN) begin
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// absolute time-of-day timestamp
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ts_tod_ns_next[8:0] = ts_rel_ns_lsb_reg + ts_tod_offset_ns_reg;
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ts_tod_ns_next[8:0] = ts_rel_ns_next[8:0] + ts_tod_offset_ns_reg;
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if (ts_tod_ns_reg[TS_TOD_NS_W-1]) begin
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if (ts_tod_ns_reg[TS_TOD_NS_W-1]) begin
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pps_str_next = 1'b0;
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pps_str_next = 1'b0;
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@ -929,8 +938,10 @@ end
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always @(posedge clk) begin
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always @(posedge clk) begin
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period_ns_reg <= period_ns_next;
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period_ns_reg <= period_ns_next;
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ts_fns_lsb_reg <= ts_fns_lsb_next;
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ts_fns_reg <= ts_fns_next;
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ts_fns_reg <= ts_fns_next;
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ts_rel_ns_lsb_reg <= ts_rel_ns_lsb_next;
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ts_rel_ns_reg <= ts_rel_ns_next;
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ts_rel_ns_reg <= ts_rel_ns_next;
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ts_rel_step_reg <= ts_rel_step_next;
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ts_rel_step_reg <= ts_rel_step_next;
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@ -975,7 +986,9 @@ always @(posedge clk) begin
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if (rst) begin
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if (rst) begin
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period_ns_reg <= 0;
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period_ns_reg <= 0;
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ts_fns_lsb_reg <= 0;
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ts_fns_reg <= 0;
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ts_fns_reg <= 0;
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ts_rel_ns_lsb_reg <= 0;
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ts_rel_ns_reg <= 0;
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ts_rel_ns_reg <= 0;
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ts_rel_step_reg <= 1'b0;
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ts_rel_step_reg <= 1'b0;
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ts_tod_s_reg <= 0;
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ts_tod_s_reg <= 0;
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