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Update readme
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README.md
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README.md
@ -27,12 +27,10 @@ related by an integer multiple (e.g. 2 words and 6 words, but not 4 words
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and 6 words). Wait states will be inserted on the wider bus side when
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necessary.
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### axis_arb_mux_N module
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### axis_arb_mux module
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Frame-aware AXI stream arbitrated muliplexer with parametrizable data width.
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Supports priority and round-robin arbitration.
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Can be generated with arbitrary port counts with axis_arb_mux.py.
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Frame-aware AXI stream arbitrated muliplexer with parametrizable data width
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and port count. Supports priority and round-robin arbitration.
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### axis_async_fifo module
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@ -60,11 +58,10 @@ width.
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Can be generated with arbitrary port counts with axis_crosspoint.py.
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### axis_demux_N module
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### axis_demux module
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Frame-aware AXI stream demuliplexer with parametrizable data width.
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Can be generated with arbitrary port counts with axis_demux.py.
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Frame-aware AXI stream demuliplexer with parametrizable data width and port
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count.
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### axis_fifo module
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@ -76,11 +73,10 @@ Supports power of two depths only.
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Basic frame-based synchronous FIFO with parametrizable data width and depth.
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Supports power of two depths only.
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### axis_frame_join_N module
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### axis_frame_join module
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Frame joiner with optional tag. 8 bit data path only.
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Can be generated with arbitrary port counts with axis_frame_join.py.
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Frame joiner with optional tag and parametrizable port count. 8 bit data path
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only.
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### axis_frame_length_adjust module
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@ -101,11 +97,10 @@ Length limits are configurable at run time.
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AXI stream to LocalLink bridge.
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### axis_mux_N module
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### axis_mux module
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Frame-aware AXI stream muliplexer with parametrizable data width.
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Can be generated with arbitrary port counts with axis_mux.py.
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Frame-aware AXI stream muliplexer with parametrizable data width and port
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count.
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### axis_rate_limit module
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@ -135,11 +130,9 @@ AXI stream interface. Trigger signal used to reset and dump counts out of AXI
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interface, along with tag value. Use with axis_frame_join_N to form a single
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monolithic frame from multiple monitored points with the same trigger.
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### axis_switch_NxN module
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### axis_switch module
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Frame-aware AXI stream switch with parametrizable data width.
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Can be generated with arbitrary port counts with axis_switch.py.
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Frame-aware AXI stream switch with parametrizable data width and port count.
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### axis_tap module
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@ -185,20 +178,16 @@ Parametrizable priority encoder.
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arbiter.v : General-purpose parametrizable arbiter
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axis_adapter.v : Parametrizable bus width adapter
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axis_arb_mux.py : Arbitrated multiplexer generator
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axis_arb_mux_4.v : 4 port arbitrated multiplexer
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axis_arb_mux.v : Parametrizable arbitrated multiplexer
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axis_async_fifo.v : Asynchronous FIFO
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axis_async_frame_fifo.v : Asynchronous frame FIFO
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axis_cobs_decode.v : COBS decoder
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axis_cobs_encode.v : COBS encoder
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axis_crosspoint.py : Crosspoint switch generator
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axis_crosspoint_4x4.v : 4x4 crosspoint switch
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axis_demux.py : Demultiplexer generator
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axis_demux_4.v : 4 port demultiplexer
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axis_crosspoint.v : Parametrizable crosspoint switch
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axis_demux.v : Parametrizable demultiplexer
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axis_fifo.v : Synchronous FIFO
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axis_frame_fifo.v : Synchronous frame FIFO
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axis_frame_join.py : Frame joiner generator
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axis_frame_join_4.v : 4 port frame joiner
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axis_frame_join.v : Parametrizable frame joiner
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axis_frame_length_adjust.v : Frame length adjuster
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axis_frame_length_adjust_fifo.v : Frame length adjuster with FIFO
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axis_ll_bridge.v : AXI stream to LocalLink bridge
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@ -208,8 +197,7 @@ Parametrizable priority encoder.
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axis_register.v : AXI Stream register
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axis_srl_fifo.v : SRL-based FIFO
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axis_srl_register.v : SRL-based register
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axis_switch.py : AXI stream switch generator
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axis_switch_4x4.v : 4x4 port AXI stream switch
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axis_switch.v : Parametrizable AXI stream switch
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axis_stat_counter.v : Statistics counter
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axis_tap.v : AXI stream tap
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ll_axis_bridge.v : LocalLink to AXI stream bridge
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