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Bitwise operators instead of generate

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This commit is contained in:
Alex Forencich 2018-12-09 00:03:09 -08:00
parent 3d90e80da8
commit aa6991a4a5
1 changed files with 2 additions and 8 deletions
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10
rtl/axis_arb_mux.v
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@ -123,14 +123,8 @@ arb_inst (
.grant_encoded(grant_encoded)
);
generate
genvar n;
for (n = 0; n < S_COUNT; n = n + 1) begin
assign request[n] = s_axis_tvalid[n] && !grant[n];
assign acknowledge[n] = grant[n] && s_axis_tvalid[n] && s_axis_tready[n] && s_axis_tlast[n];
end
endgenerate
assign request = s_axis_tvalid & ~grant;
assign acknowledge = grant & s_axis_tvalid & s_axis_tready & s_axis_tlast;
always @* begin
// pass through selected packet data