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Fix MAC RX PTP timestamp in sideband for axis_baser_rx_64

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-05-16 17:14:41 -07:00
parent 80a25731b8
commit af0e15b241
1 changed files with 13 additions and 8 deletions
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21
rtl/axis_baser_rx_64.v
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@ -182,7 +182,7 @@ reg [DATA_WIDTH-1:0] m_axis_tdata_reg = {DATA_WIDTH{1'b0}}, m_axis_tdata_next;
reg [KEEP_WIDTH-1:0] m_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}, m_axis_tkeep_next;
reg m_axis_tvalid_reg = 1'b0, m_axis_tvalid_next;
reg m_axis_tlast_reg = 1'b0, m_axis_tlast_next;
reg m_axis_tuser_reg = 1'b0, m_axis_tuser_next;
reg [USER_WIDTH-1:0] m_axis_tuser_reg = {USER_WIDTH{1'b0}}, m_axis_tuser_next;
reg [1:0] start_packet_reg = 2'b00;
reg error_bad_frame_reg = 1'b0, error_bad_frame_next;
@ -212,7 +212,7 @@ assign m_axis_tdata = m_axis_tdata_reg;
assign m_axis_tkeep = m_axis_tkeep_reg;
assign m_axis_tvalid = m_axis_tvalid_reg;
assign m_axis_tlast = m_axis_tlast_reg;
assign m_axis_tuser = PTP_TS_ENABLE ? {ptp_ts_reg, m_axis_tuser_reg} : m_axis_tuser_reg;
assign m_axis_tuser = m_axis_tuser_reg;
assign start_packet = start_packet_reg;
assign error_bad_frame = error_bad_frame_reg;
@ -309,7 +309,8 @@ always @* begin
m_axis_tkeep_next = 8'd0;
m_axis_tvalid_next = 1'b0;
m_axis_tlast_next = 1'b0;
m_axis_tuser_next = 1'b0;
m_axis_tuser_next = m_axis_tuser_reg;
m_axis_tuser_next[0] = 1'b0;
error_bad_frame_next = 1'b0;
error_bad_fcs_next = 1'b0;
@ -319,6 +320,10 @@ always @* begin
// idle state - wait for packet
reset_crc = 1'b1;
if (PTP_TS_ENABLE) begin
m_axis_tuser_next[1 +: PTP_TS_WIDTH] = ptp_ts_reg;
end
if (input_type_d1 == INPUT_TYPE_START_0) begin
// start condition
reset_crc = 1'b0;
@ -333,7 +338,7 @@ always @* begin
m_axis_tkeep_next = 8'hff;
m_axis_tvalid_next = 1'b1;
m_axis_tlast_next = 1'b0;
m_axis_tuser_next = 1'b0;
m_axis_tuser_next[0] = 1'b0;
if (input_type_d0 == INPUT_TYPE_DATA) begin
state_next = STATE_PAYLOAD;
@ -357,7 +362,7 @@ always @* begin
(input_type_d0 == INPUT_TYPE_TERM_4 && crc_valid3)) begin
// CRC valid
end else begin
m_axis_tuser_next = 1'b1;
m_axis_tuser_next[0] = 1'b1;
error_bad_frame_next = 1'b1;
error_bad_fcs_next = 1'b1;
end
@ -370,7 +375,7 @@ always @* begin
end else begin
// control or error characters in packet
m_axis_tlast_next = 1'b1;
m_axis_tuser_next = 1'b1;
m_axis_tuser_next[0] = 1'b1;
error_bad_frame_next = 1'b1;
reset_crc = 1'b1;
state_next = STATE_IDLE;
@ -382,7 +387,7 @@ always @* begin
m_axis_tkeep_next = 8'hff;
m_axis_tvalid_next = 1'b1;
m_axis_tlast_next = 1'b1;
m_axis_tuser_next = 1'b0;
m_axis_tuser_next[0] = 1'b0;
reset_crc = 1'b1;
@ -397,7 +402,7 @@ always @* begin
(input_type_d1 == INPUT_TYPE_TERM_7 && crc_valid2)) begin
// CRC valid
end else begin
m_axis_tuser_next = 1'b1;
m_axis_tuser_next[0] = 1'b1;
error_bad_frame_next = 1'b1;
error_bad_fcs_next = 1'b1;
end