From d023213fdac53e390e7d9f4e4953e569eaf983a4 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 24 Jul 2016 13:06:59 -0700 Subject: [PATCH] Support generating asymmetric crosspoints --- rtl/axis_crosspoint.py | 57 ++++++++++++++++++++++----------------- rtl/axis_crosspoint_64.py | 57 ++++++++++++++++++++++----------------- 2 files changed, 64 insertions(+), 50 deletions(-) diff --git a/rtl/axis_crosspoint.py b/rtl/axis_crosspoint.py index f1dd1832..260b2398 100755 --- a/rtl/axis_crosspoint.py +++ b/rtl/axis_crosspoint.py @@ -11,7 +11,7 @@ from jinja2 import Template def main(): parser = argparse.ArgumentParser(description=__doc__.strip()) - parser.add_argument('-p', '--ports', type=int, default=4, help="number of ports") + parser.add_argument('-p', '--ports', type=int, default=[4], nargs='+', help="number of ports") parser.add_argument('-n', '--name', type=str, help="module name") parser.add_argument('-o', '--output', type=str, help="output file name") @@ -24,8 +24,15 @@ def main(): exit(1) def generate(ports=4, name=None, output=None): + if type(ports) is int: + m = n = ports + elif len(ports) == 1: + m = n = ports[0] + else: + m, n = ports + if name is None: - name = "axis_crosspoint_{0}x{0}".format(ports) + name = "axis_crosspoint_{0}x{1}".format(m, n) if output is None: output = name + ".v" @@ -34,9 +41,9 @@ def generate(ports=4, name=None, output=None): output_file = open(output, 'w') - print("Generating {0} port AXI Stream crosspoint {1}...".format(ports, name)) + print("Generating {0}x{1} port AXI Stream crosspoint {2}...".format(m, n, name)) - select_width = int(math.ceil(math.log(ports, 2))) + select_width = int(math.ceil(math.log(m, 2))) t = Template(u"""/* @@ -67,7 +74,7 @@ THE SOFTWARE. `timescale 1ns / 1ps /* - * AXI4-Stream {{n}}x{{n}} crosspoint + * AXI4-Stream {{m}}x{{n}} crosspoint */ module {{name}} # ( @@ -80,7 +87,7 @@ module {{name}} # /* * AXI Stream inputs */ -{%- for p in ports %} +{%- for p in range(m) %} input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata, input wire input_{{p}}_axis_tvalid, input wire input_{{p}}_axis_tlast, @@ -89,7 +96,7 @@ module {{name}} # /* * AXI Stream outputs */ -{%- for p in ports %} +{%- for p in range(n) %} output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata, output wire output_{{p}}_axis_tvalid, output wire output_{{p}}_axis_tlast, @@ -98,28 +105,28 @@ module {{name}} # /* * Control */ -{%- for p in ports %} +{%- for p in range(n) %} input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %} {%- endfor %} ); -{% for p in ports %} +{% for p in range(m) %} reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}}; reg input_{{p}}_axis_tvalid_reg = 1'b0; reg input_{{p}}_axis_tlast_reg = 1'b0; reg input_{{p}}_axis_tuser_reg = 1'b0; {% endfor %} -{%- for p in ports %} +{%- for p in range(n) %} reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}}; reg output_{{p}}_axis_tvalid_reg = 1'b0; reg output_{{p}}_axis_tlast_reg = 1'b0; reg output_{{p}}_axis_tuser_reg = 1'b0; {% endfor %} -{%- for p in ports %} +{%- for p in range(n) %} reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg; assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg; assign output_{{p}}_axis_tlast = output_{{p}}_axis_tlast_reg; @@ -128,41 +135,41 @@ assign output_{{p}}_axis_tuser = output_{{p}}_axis_tuser_reg; always @(posedge clk) begin if (rst) begin -{%- for p in ports %} +{%- for p in range(n) %} output_{{p}}_select_reg <= {{w}}'d0; {%- endfor %} -{% for p in ports %} +{% for p in range(m) %} input_{{p}}_axis_tvalid_reg <= 1'b0; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} output_{{p}}_axis_tvalid_reg <= 1'b0; {%- endfor %} end else begin -{%- for p in ports %} +{%- for p in range(m) %} input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} output_{{p}}_select_reg <= output_{{p}}_select; {%- endfor %} -{%- for p in ports %} +{%- for p in range(n) %} case (output_{{p}}_select_reg) -{%- for q in ports %} +{%- for q in range(m) %} {{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg; {%- endfor %} endcase {%- endfor %} end -{%- for p in ports %} +{%- for p in range(m) %} input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata; input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast; input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser; {%- endfor %} -{%- for p in ports %} +{%- for p in range(n) %} case (output_{{p}}_select_reg) -{%- for q in ports %} +{%- for q in range(m) %} {{w}}'d{{q}}: begin output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg; output_{{p}}_axis_tlast_reg <= input_{{q}}_axis_tlast_reg; @@ -178,10 +185,10 @@ endmodule """) output_file.write(t.render( - n=ports, + m=m, + n=n, w=select_width, - name=name, - ports=range(ports) + name=name )) print("Done") diff --git a/rtl/axis_crosspoint_64.py b/rtl/axis_crosspoint_64.py index 75ff0bba..25d2acde 100755 --- a/rtl/axis_crosspoint_64.py +++ b/rtl/axis_crosspoint_64.py @@ -11,7 +11,7 @@ from jinja2 import Template def main(): parser = argparse.ArgumentParser(description=__doc__.strip()) - parser.add_argument('-p', '--ports', type=int, default=4, help="number of ports") + parser.add_argument('-p', '--ports', type=int, default=[4], nargs='+', help="number of ports") parser.add_argument('-n', '--name', type=str, help="module name") parser.add_argument('-o', '--output', type=str, help="output file name") @@ -24,8 +24,15 @@ def main(): exit(1) def generate(ports=4, name=None, output=None): + if type(ports) is int: + m = n = ports + elif len(ports) == 1: + m = n = ports[0] + else: + m, n = ports + if name is None: - name = "axis_crosspoint_64_{0}x{0}".format(ports) + name = "axis_crosspoint_64_{0}x{1}".format(m, n) if output is None: output = name + ".v" @@ -34,9 +41,9 @@ def generate(ports=4, name=None, output=None): output_file = open(output, 'w') - print("Generating {0} port AXI Stream crosspoint {1}...".format(ports, name)) + print("Generating {0}x{1} port AXI Stream crosspoint {2}...".format(m, n, name)) - select_width = int(math.ceil(math.log(ports, 2))) + select_width = int(math.ceil(math.log(m, 2))) t = Template(u"""/* @@ -67,7 +74,7 @@ THE SOFTWARE. `timescale 1ns / 1ps /* - * AXI4-Stream {{n}}x{{n}} crosspoint (64 bit datapath) + * AXI4-Stream {{m}}x{{n}} crosspoint (64 bit datapath) */ module {{name}} # ( @@ -81,7 +88,7 @@ module {{name}} # /* * AXI Stream inputs */ -{%- for p in ports %} +{%- for p in range(m) %} input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata, input wire [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep, input wire input_{{p}}_axis_tvalid, @@ -91,7 +98,7 @@ module {{name}} # /* * AXI Stream outputs */ -{%- for p in ports %} +{%- for p in range(n) %} output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata, output wire [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep, output wire output_{{p}}_axis_tvalid, @@ -101,11 +108,11 @@ module {{name}} # /* * Control */ -{%- for p in ports %} +{%- for p in range(n) %} input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %} {%- endfor %} ); -{% for p in ports %} +{% for p in range(m) %} reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}}; reg [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; reg input_{{p}}_axis_tvalid_reg = 1'b0; @@ -113,7 +120,7 @@ reg input_{{p}}_axis_tlast_reg = 1'b0; reg input_{{p}}_axis_tuser_reg = 1'b0; {% endfor %} -{%- for p in ports %} +{%- for p in range(n) %} reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}}; reg [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; reg output_{{p}}_axis_tvalid_reg = 1'b0; @@ -121,10 +128,10 @@ reg output_{{p}}_axis_tlast_reg = 1'b0; reg output_{{p}}_axis_tuser_reg = 1'b0; {% endfor %} -{%- for p in ports %} +{%- for p in range(n) %} reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg; assign output_{{p}}_axis_tkeep = output_{{p}}_axis_tkeep_reg; assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg; @@ -134,42 +141,42 @@ assign output_{{p}}_axis_tuser = output_{{p}}_axis_tuser_reg; always @(posedge clk) begin if (rst) begin -{%- for p in ports %} +{%- for p in range(n) %} output_{{p}}_select_reg <= {{w}}'d0; {%- endfor %} -{% for p in ports %} +{% for p in range(m) %} input_{{p}}_axis_tvalid_reg <= 1'b0; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} output_{{p}}_axis_tvalid_reg <= 1'b0; {%- endfor %} end else begin -{%- for p in ports %} +{%- for p in range(m) %} input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid; {%- endfor %} -{% for p in ports %} +{% for p in range(n) %} output_{{p}}_select_reg <= output_{{p}}_select; {%- endfor %} -{%- for p in ports %} +{%- for p in range(n) %} case (output_{{p}}_select_reg) -{%- for q in ports %} +{%- for q in range(m) %} {{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg; {%- endfor %} endcase {%- endfor %} end -{%- for p in ports %} +{%- for p in range(m) %} input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata; input_{{p}}_axis_tkeep_reg <= input_{{p}}_axis_tkeep; input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast; input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser; {%- endfor %} -{%- for p in ports %} +{%- for p in range(n) %} case (output_{{p}}_select_reg) -{%- for q in ports %} +{%- for q in range(m) %} {{w}}'d{{q}}: begin output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg; output_{{p}}_axis_tkeep_reg <= input_{{q}}_axis_tkeep_reg; @@ -186,10 +193,10 @@ endmodule """) output_file.write(t.render( - n=ports, + m=m, + n=n, w=select_width, - name=name, - ports=range(ports) + name=name )) print("Done")