mirror of
https://github.com/alexforencich/verilog-ethernet.git
synced 2025-01-14 06:43:18 +08:00
Support generating asymmetric crosspoints
This commit is contained in:
parent
52fc34d82e
commit
d023213fda
@ -11,7 +11,7 @@ from jinja2 import Template
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def main():
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def main():
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parser = argparse.ArgumentParser(description=__doc__.strip())
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parser = argparse.ArgumentParser(description=__doc__.strip())
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parser.add_argument('-p', '--ports', type=int, default=4, help="number of ports")
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parser.add_argument('-p', '--ports', type=int, default=[4], nargs='+', help="number of ports")
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parser.add_argument('-n', '--name', type=str, help="module name")
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parser.add_argument('-n', '--name', type=str, help="module name")
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parser.add_argument('-o', '--output', type=str, help="output file name")
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parser.add_argument('-o', '--output', type=str, help="output file name")
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@ -24,8 +24,15 @@ def main():
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exit(1)
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exit(1)
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def generate(ports=4, name=None, output=None):
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def generate(ports=4, name=None, output=None):
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if type(ports) is int:
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m = n = ports
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elif len(ports) == 1:
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m = n = ports[0]
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else:
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m, n = ports
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if name is None:
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if name is None:
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name = "axis_crosspoint_{0}x{0}".format(ports)
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name = "axis_crosspoint_{0}x{1}".format(m, n)
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if output is None:
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if output is None:
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output = name + ".v"
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output = name + ".v"
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@ -34,9 +41,9 @@ def generate(ports=4, name=None, output=None):
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output_file = open(output, 'w')
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output_file = open(output, 'w')
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print("Generating {0} port AXI Stream crosspoint {1}...".format(ports, name))
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print("Generating {0}x{1} port AXI Stream crosspoint {2}...".format(m, n, name))
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select_width = int(math.ceil(math.log(ports, 2)))
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select_width = int(math.ceil(math.log(m, 2)))
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t = Template(u"""/*
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t = Template(u"""/*
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@ -67,7 +74,7 @@ THE SOFTWARE.
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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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/*
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/*
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* AXI4-Stream {{n}}x{{n}} crosspoint
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* AXI4-Stream {{m}}x{{n}} crosspoint
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*/
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*/
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module {{name}} #
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module {{name}} #
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(
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(
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@ -80,7 +87,7 @@ module {{name}} #
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/*
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/*
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* AXI Stream inputs
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* AXI Stream inputs
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(m) %}
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input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata,
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input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata,
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input wire input_{{p}}_axis_tvalid,
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input wire input_{{p}}_axis_tvalid,
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input wire input_{{p}}_axis_tlast,
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input wire input_{{p}}_axis_tlast,
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@ -89,7 +96,7 @@ module {{name}} #
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/*
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/*
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* AXI Stream outputs
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* AXI Stream outputs
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(n) %}
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output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata,
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output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata,
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output wire output_{{p}}_axis_tvalid,
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output wire output_{{p}}_axis_tvalid,
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output wire output_{{p}}_axis_tlast,
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output wire output_{{p}}_axis_tlast,
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@ -98,28 +105,28 @@ module {{name}} #
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/*
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/*
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* Control
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* Control
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(n) %}
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input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %}
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input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %}
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{%- endfor %}
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{%- endfor %}
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);
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);
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{% for p in ports %}
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{% for p in range(m) %}
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reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg input_{{p}}_axis_tvalid_reg = 1'b0;
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reg input_{{p}}_axis_tvalid_reg = 1'b0;
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reg input_{{p}}_axis_tlast_reg = 1'b0;
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reg input_{{p}}_axis_tlast_reg = 1'b0;
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reg input_{{p}}_axis_tuser_reg = 1'b0;
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reg input_{{p}}_axis_tuser_reg = 1'b0;
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{% endfor %}
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{% endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg output_{{p}}_axis_tvalid_reg = 1'b0;
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reg output_{{p}}_axis_tvalid_reg = 1'b0;
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reg output_{{p}}_axis_tlast_reg = 1'b0;
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reg output_{{p}}_axis_tlast_reg = 1'b0;
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reg output_{{p}}_axis_tuser_reg = 1'b0;
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reg output_{{p}}_axis_tuser_reg = 1'b0;
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{% endfor %}
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{% endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0;
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reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg;
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assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg;
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assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg;
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assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg;
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assign output_{{p}}_axis_tlast = output_{{p}}_axis_tlast_reg;
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assign output_{{p}}_axis_tlast = output_{{p}}_axis_tlast_reg;
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@ -128,41 +135,41 @@ assign output_{{p}}_axis_tuser = output_{{p}}_axis_tuser_reg;
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (rst) begin
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if (rst) begin
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{%- for p in ports %}
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{%- for p in range(n) %}
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output_{{p}}_select_reg <= {{w}}'d0;
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output_{{p}}_select_reg <= {{w}}'d0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(m) %}
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input_{{p}}_axis_tvalid_reg <= 1'b0;
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input_{{p}}_axis_tvalid_reg <= 1'b0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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output_{{p}}_axis_tvalid_reg <= 1'b0;
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output_{{p}}_axis_tvalid_reg <= 1'b0;
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{%- endfor %}
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{%- endfor %}
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end else begin
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end else begin
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{%- for p in ports %}
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{%- for p in range(m) %}
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input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid;
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input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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output_{{p}}_select_reg <= output_{{p}}_select;
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output_{{p}}_select_reg <= output_{{p}}_select;
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{%- endfor %}
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{%- endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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case (output_{{p}}_select_reg)
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case (output_{{p}}_select_reg)
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{%- for q in ports %}
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{%- for q in range(m) %}
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{{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg;
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{{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg;
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{%- endfor %}
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{%- endfor %}
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endcase
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endcase
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{%- endfor %}
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{%- endfor %}
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end
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end
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{%- for p in ports %}
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{%- for p in range(m) %}
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input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata;
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input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata;
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input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast;
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input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast;
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input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser;
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input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser;
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{%- endfor %}
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{%- endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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case (output_{{p}}_select_reg)
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case (output_{{p}}_select_reg)
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{%- for q in ports %}
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{%- for q in range(m) %}
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{{w}}'d{{q}}: begin
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{{w}}'d{{q}}: begin
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output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg;
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output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg;
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output_{{p}}_axis_tlast_reg <= input_{{q}}_axis_tlast_reg;
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output_{{p}}_axis_tlast_reg <= input_{{q}}_axis_tlast_reg;
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@ -178,10 +185,10 @@ endmodule
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""")
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""")
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output_file.write(t.render(
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output_file.write(t.render(
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n=ports,
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m=m,
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n=n,
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w=select_width,
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w=select_width,
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name=name,
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name=name
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ports=range(ports)
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))
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))
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print("Done")
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print("Done")
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@ -11,7 +11,7 @@ from jinja2 import Template
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def main():
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def main():
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parser = argparse.ArgumentParser(description=__doc__.strip())
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parser = argparse.ArgumentParser(description=__doc__.strip())
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parser.add_argument('-p', '--ports', type=int, default=4, help="number of ports")
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parser.add_argument('-p', '--ports', type=int, default=[4], nargs='+', help="number of ports")
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parser.add_argument('-n', '--name', type=str, help="module name")
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parser.add_argument('-n', '--name', type=str, help="module name")
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parser.add_argument('-o', '--output', type=str, help="output file name")
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parser.add_argument('-o', '--output', type=str, help="output file name")
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@ -24,8 +24,15 @@ def main():
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exit(1)
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exit(1)
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def generate(ports=4, name=None, output=None):
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def generate(ports=4, name=None, output=None):
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if type(ports) is int:
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m = n = ports
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elif len(ports) == 1:
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m = n = ports[0]
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else:
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m, n = ports
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if name is None:
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if name is None:
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name = "axis_crosspoint_64_{0}x{0}".format(ports)
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name = "axis_crosspoint_64_{0}x{1}".format(m, n)
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if output is None:
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if output is None:
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output = name + ".v"
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output = name + ".v"
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@ -34,9 +41,9 @@ def generate(ports=4, name=None, output=None):
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output_file = open(output, 'w')
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output_file = open(output, 'w')
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print("Generating {0} port AXI Stream crosspoint {1}...".format(ports, name))
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print("Generating {0}x{1} port AXI Stream crosspoint {2}...".format(m, n, name))
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select_width = int(math.ceil(math.log(ports, 2)))
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select_width = int(math.ceil(math.log(m, 2)))
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t = Template(u"""/*
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t = Template(u"""/*
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@ -67,7 +74,7 @@ THE SOFTWARE.
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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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/*
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/*
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* AXI4-Stream {{n}}x{{n}} crosspoint (64 bit datapath)
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* AXI4-Stream {{m}}x{{n}} crosspoint (64 bit datapath)
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*/
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*/
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module {{name}} #
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module {{name}} #
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(
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(
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@ -81,7 +88,7 @@ module {{name}} #
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/*
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/*
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* AXI Stream inputs
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* AXI Stream inputs
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(m) %}
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input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata,
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input wire [DATA_WIDTH-1:0] input_{{p}}_axis_tdata,
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input wire [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep,
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input wire [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep,
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input wire input_{{p}}_axis_tvalid,
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input wire input_{{p}}_axis_tvalid,
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@ -91,7 +98,7 @@ module {{name}} #
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/*
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/*
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* AXI Stream outputs
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* AXI Stream outputs
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(n) %}
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output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata,
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output wire [DATA_WIDTH-1:0] output_{{p}}_axis_tdata,
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output wire [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep,
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output wire [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep,
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output wire output_{{p}}_axis_tvalid,
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output wire output_{{p}}_axis_tvalid,
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@ -101,11 +108,11 @@ module {{name}} #
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/*
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/*
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* Control
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* Control
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*/
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*/
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{%- for p in ports %}
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{%- for p in range(n) %}
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input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %}
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input wire [{{w-1}}:0] output_{{p}}_select{% if not loop.last %},{% endif %}
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{%- endfor %}
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{%- endfor %}
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);
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);
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{% for p in ports %}
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{% for p in range(m) %}
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reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [DATA_WIDTH-1:0] input_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}};
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reg [KEEP_WIDTH-1:0] input_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}};
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reg input_{{p}}_axis_tvalid_reg = 1'b0;
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reg input_{{p}}_axis_tvalid_reg = 1'b0;
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@ -113,7 +120,7 @@ reg input_{{p}}_axis_tlast_reg = 1'b0;
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reg input_{{p}}_axis_tuser_reg = 1'b0;
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reg input_{{p}}_axis_tuser_reg = 1'b0;
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{% endfor %}
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{% endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [DATA_WIDTH-1:0] output_{{p}}_axis_tdata_reg = {DATA_WIDTH{1'b0}};
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reg [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}};
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reg [KEEP_WIDTH-1:0] output_{{p}}_axis_tkeep_reg = {KEEP_WIDTH{1'b0}};
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reg output_{{p}}_axis_tvalid_reg = 1'b0;
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reg output_{{p}}_axis_tvalid_reg = 1'b0;
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@ -121,10 +128,10 @@ reg output_{{p}}_axis_tlast_reg = 1'b0;
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reg output_{{p}}_axis_tuser_reg = 1'b0;
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reg output_{{p}}_axis_tuser_reg = 1'b0;
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{% endfor %}
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{% endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0;
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reg [{{w-1}}:0] output_{{p}}_select_reg = {{w}}'d0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg;
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assign output_{{p}}_axis_tdata = output_{{p}}_axis_tdata_reg;
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assign output_{{p}}_axis_tkeep = output_{{p}}_axis_tkeep_reg;
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assign output_{{p}}_axis_tkeep = output_{{p}}_axis_tkeep_reg;
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assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg;
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assign output_{{p}}_axis_tvalid = output_{{p}}_axis_tvalid_reg;
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@ -134,42 +141,42 @@ assign output_{{p}}_axis_tuser = output_{{p}}_axis_tuser_reg;
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (rst) begin
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if (rst) begin
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{%- for p in ports %}
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{%- for p in range(n) %}
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output_{{p}}_select_reg <= {{w}}'d0;
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output_{{p}}_select_reg <= {{w}}'d0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(m) %}
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input_{{p}}_axis_tvalid_reg <= 1'b0;
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input_{{p}}_axis_tvalid_reg <= 1'b0;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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output_{{p}}_axis_tvalid_reg <= 1'b0;
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output_{{p}}_axis_tvalid_reg <= 1'b0;
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{%- endfor %}
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{%- endfor %}
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end else begin
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end else begin
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{%- for p in ports %}
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{%- for p in range(m) %}
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input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid;
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input_{{p}}_axis_tvalid_reg <= input_{{p}}_axis_tvalid;
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{%- endfor %}
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{%- endfor %}
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{% for p in ports %}
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{% for p in range(n) %}
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output_{{p}}_select_reg <= output_{{p}}_select;
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output_{{p}}_select_reg <= output_{{p}}_select;
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{%- endfor %}
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{%- endfor %}
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{%- for p in ports %}
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{%- for p in range(n) %}
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case (output_{{p}}_select_reg)
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case (output_{{p}}_select_reg)
|
||||||
{%- for q in ports %}
|
{%- for q in range(m) %}
|
||||||
{{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg;
|
{{w}}'d{{q}}: output_{{p}}_axis_tvalid_reg <= input_{{q}}_axis_tvalid_reg;
|
||||||
{%- endfor %}
|
{%- endfor %}
|
||||||
endcase
|
endcase
|
||||||
{%- endfor %}
|
{%- endfor %}
|
||||||
end
|
end
|
||||||
{%- for p in ports %}
|
{%- for p in range(m) %}
|
||||||
|
|
||||||
input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata;
|
input_{{p}}_axis_tdata_reg <= input_{{p}}_axis_tdata;
|
||||||
input_{{p}}_axis_tkeep_reg <= input_{{p}}_axis_tkeep;
|
input_{{p}}_axis_tkeep_reg <= input_{{p}}_axis_tkeep;
|
||||||
input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast;
|
input_{{p}}_axis_tlast_reg <= input_{{p}}_axis_tlast;
|
||||||
input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser;
|
input_{{p}}_axis_tuser_reg <= input_{{p}}_axis_tuser;
|
||||||
{%- endfor %}
|
{%- endfor %}
|
||||||
{%- for p in ports %}
|
{%- for p in range(n) %}
|
||||||
|
|
||||||
case (output_{{p}}_select_reg)
|
case (output_{{p}}_select_reg)
|
||||||
{%- for q in ports %}
|
{%- for q in range(m) %}
|
||||||
{{w}}'d{{q}}: begin
|
{{w}}'d{{q}}: begin
|
||||||
output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg;
|
output_{{p}}_axis_tdata_reg <= input_{{q}}_axis_tdata_reg;
|
||||||
output_{{p}}_axis_tkeep_reg <= input_{{q}}_axis_tkeep_reg;
|
output_{{p}}_axis_tkeep_reg <= input_{{q}}_axis_tkeep_reg;
|
||||||
@ -186,10 +193,10 @@ endmodule
|
|||||||
""")
|
""")
|
||||||
|
|
||||||
output_file.write(t.render(
|
output_file.write(t.render(
|
||||||
n=ports,
|
m=m,
|
||||||
|
n=n,
|
||||||
w=select_width,
|
w=select_width,
|
||||||
name=name,
|
name=name
|
||||||
ports=range(ports)
|
|
||||||
))
|
))
|
||||||
|
|
||||||
print("Done")
|
print("Done")
|
||||||
|
Loading…
x
Reference in New Issue
Block a user