From d57c857d88b71a1e9b174e6050686479bf904958 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sat, 28 Feb 2015 18:24:20 -0800 Subject: [PATCH] Put PHY interface registers into IOBs for timing --- rtl/gmii_phy_if.v | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/rtl/gmii_phy_if.v b/rtl/gmii_phy_if.v index 21bd9c65..5f9d29eb 100644 --- a/rtl/gmii_phy_if.v +++ b/rtl/gmii_phy_if.v @@ -155,8 +155,11 @@ always @(posedge mac_gmii_rx_clk or posedge rst) begin end // register RX data from PHY to MAC +(* IOB = "TRUE" *) reg [7:0] gmii_rxd_reg = 0; +(* IOB = "TRUE" *) reg gmii_rx_dv_reg = 0; +(* IOB = "TRUE" *) reg gmii_rx_er_reg = 0; always @(posedge phy_gmii_rx_clk_io) begin @@ -170,8 +173,11 @@ assign mac_gmii_rx_dv = gmii_rx_dv_reg; assign mac_gmii_rx_er = gmii_rx_er_reg; // register TX data from MAC to PHY +(* IOB = "TRUE" *) reg [7:0] gmii_txd_reg = 0; +(* IOB = "TRUE" *) reg gmii_tx_en_reg = 0; +(* IOB = "TRUE" *) reg gmii_tx_er_reg = 0; always @(posedge phy_gmii_tx_clk_int) begin