Alex Forencich
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a2294c56a5
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Rewrite gain scheduling
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-12-01 22:02:40 -08:00 |
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Alex Forencich
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5560fa2b32
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Fix timestamp capture/sync logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-11-30 14:05:16 -08:00 |
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Alex Forencich
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01badce3a1
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Remove unnecessary resets
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-11-01 18:30:32 -07:00 |
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Alex Forencich
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90e6dfc638
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Use phase detector in PTP CDC module for coarse period tuning, use 9 LSBs of timestamp for fine sync to avoid rollover corrections, reduce FNS comparison width to 4 bits
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-23 14:58:44 -07:00 |
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Alex Forencich
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f9ae6da8bd
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Improve PTP CDC module testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-23 14:33:14 -07:00 |
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Alex Forencich
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5a37442706
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Merge FNS registers into NS registers in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-22 22:52:59 -07:00 |
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Alex Forencich
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b0a4d75fd9
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Remove extraneous code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-22 01:08:01 -07:00 |
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Alex Forencich
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4a32c86f07
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Match integrator width to period register width in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-22 01:07:43 -07:00 |
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Alex Forencich
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cf441f004d
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Rename source sync signals in PTP CDC module for consistency
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-22 01:07:12 -07:00 |
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Alex Forencich
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4b1f48ab5b
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Parameter clean-up in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-21 16:34:05 -07:00 |
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Alex Forencich
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aad30d09a1
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Make FNS_WIDTH an internal parameter in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-21 16:30:29 -07:00 |
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Alex Forencich
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98b4fbb56d
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Remove USE_SAMPLE_CLOCK parameter in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-09-18 16:58:02 -07:00 |
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Alex Forencich
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c1e947dc3d
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Timing optimization of PTP modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-22 22:57:44 -07:00 |
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Alex Forencich
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db881ed551
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Remove magic numbers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-22 18:39:21 -07:00 |
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Alex Forencich
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4a16c9070b
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Fix mixed assignments
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-22 01:24:22 -07:00 |
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Alex Forencich
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7cb15647e7
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Better handling of integrator saturation in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-16 23:15:31 -07:00 |
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Alex Forencich
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d96d5dfba0
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Fix clock active detection in PTP CDC module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-16 23:13:36 -07:00 |
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Alex Forencich
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7e5f6a2589
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Remove extraneous code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-16 18:54:29 -07:00 |
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Alex Forencich
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6f2d581d62
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Add output pipeline to PTP clock CDC module
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2022-03-27 23:47:14 -07:00 |
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Alex Forencich
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108c02d721
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Simplify logic in PTP clock CDC module
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2022-03-16 19:01:17 -07:00 |
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Alex Forencich
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6b18e56cb1
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Add default_nettype none and resetall directives
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2021-10-20 17:29:12 -07:00 |
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Alex Forencich
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2796e681c9
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Prevent latch inference
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2021-03-30 22:23:40 -07:00 |
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Alex Forencich
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31c7349f90
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Rewrite PTP clock CDC module for improved performance and timing closure at 25G
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2021-03-30 15:57:46 -07:00 |
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Alex Forencich
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b26f923c2f
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Reset synchronizers
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2019-07-18 18:35:30 -07:00 |
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Alex Forencich
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adb9c4d147
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Fix initial values
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2019-07-18 18:35:11 -07:00 |
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Alex Forencich
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cc1ff34f53
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Add 64 bit timestamp support to ptp_clock_cdc
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2019-07-15 16:36:02 -07:00 |
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Alex Forencich
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31cb54e67e
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Make old icarus verilog happy
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2019-07-15 16:15:50 -07:00 |
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Alex Forencich
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77bae7a77e
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Add PTP clock CDC module and testbench
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2019-07-15 15:16:17 -07:00 |
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